* [PATCH v4 0/2] qcom: qcs8300: Add qcs8300 camss support @ 2025-10-15 13:01 Vikram Sharma 2025-10-15 13:01 ` [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies Vikram Sharma 2025-10-15 13:01 ` [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss Vikram Sharma 0 siblings, 2 replies; 13+ messages in thread From: Vikram Sharma @ 2025-10-15 13:01 UTC (permalink / raw) To: bryan.odonoghue, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, quic_vikramsa, linux-media, linux-arm-msm, devicetree, linux-kernel From: Vikram Sharma <vikramsa@qti.qualcomm.com> QCS8300 is a Qualcomm SoC. This series adds bindings and devicetree and driver changes to bring up CSIPHY, TPG, CSID, VFE/RDI interfaces in QCS8300. QCS8300 provides - 2 x VFE, 3 RDI per VFE - 5 x VFE Lite, 6 RDI per VFE - 2 x CSID - 5 x CSID Lite - 3 x TPG - 3 x CSIPHY Changes in v3 compared to v3: - Added supplies in bindings to enable camera sensor. This change was earlier added as V3.1 of Binidings which was reviewed by Krzysztof and Bryan. Link to this discussion: https://lore.kernel.org/all/20250910104915.1444669-1-quic_vikramsa@quicinc.com/ - Droped the zero-prefix from the size field un DT patch - Konrad - Link to v3: https://lore.kernel.org/all/20250813053724.232494-1-quic_vikramsa@quicinc.com/ Changes in v3 compared to v2: - Bindings and Device Tree: Reordered csid_wrapper to appear first in the register list (as suggested by Bryan). - CSIPHY Driver: Updated the commit message for the CSIPHY patch. - VFE/CSID Resource Data: Reused the same resource data as sa8775p for VFE and CSID. - Patch Series Order: Rearranged the patch sequence and moved the DTSI update to the final patch in the series. - Code Cleanup: Removed duplicate data structures and reused existing ones. - Optimization: Simplified and optimized conditional checks. - Link to v2: https://lore.kernel.org/linux-arm-msm/20250711131134.215382-1-quic_vikramsa@quicinc.com/ Changes compared to v1: - Changed the order for register entries in bindings - Krzysztof - Changed the naming for interrupts for consistency - Krzysztof - Combined separate series for driver and dtsi into one. - Rebased on top of latest version of sa8775p camss patches. - Link to v1: Driver: https://lore.kernel.org/all/20250214095611.2498950-1-quic_vikramsa@quicinc.com DTSI: https://lore.kernel.org/all/20250214094747.2483058-1-quic_vikramsa@quicinc.com We have tested this on qcs8300-ride board with 'Test Pattern Generator' https://lore.kernel.org/all/20250925-camss_tpg-v4-0-d2eb099902c8@oss.qualcomm.com/ Used following tools for the sanity check of these changes. - make CHECK_DTBS=y W=1 DT_SCHEMA_FILES=media/qcom,qcs8300-camss.yaml qcom/qcs8300-ride.dtb - make DT_CHECKER_FLAGS=-m W=1 DT_SCHEMA_FILES=media/qcom,qcs8300-camss.yaml dt_binding_check - make -j32 W=1 - checkpatch.pl Vikram Sharma (2): dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies arm64: dts: qcom: qcs8300: Add support for camss .../bindings/media/qcom,qcs8300-camss.yaml | 13 ++ arch/arm64/boot/dts/qcom/qcs8300.dtsi | 171 ++++++++++++++++++ 2 files changed, 184 insertions(+) -- 2.25.1 ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies 2025-10-15 13:01 [PATCH v4 0/2] qcom: qcs8300: Add qcs8300 camss support Vikram Sharma @ 2025-10-15 13:01 ` Vikram Sharma 2025-10-15 13:30 ` Bryan O'Donoghue 2025-10-15 18:41 ` Vladimir Zapolskiy 2025-10-15 13:01 ` [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss Vikram Sharma 1 sibling, 2 replies; 13+ messages in thread From: Vikram Sharma @ 2025-10-15 13:01 UTC (permalink / raw) To: bryan.odonoghue, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, quic_vikramsa, linux-media, linux-arm-msm, devicetree, linux-kernel, Nihal Kumar Gupta Add support for vdda-phy-supply and vdda-pll-supply in the QCS8300 CAMSS binding to reflect camera sensor hardware requirements. Co-developed-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> --- .../bindings/media/qcom,qcs8300-camss.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml index 80a4540a22dc..dce0a1fcb10c 100644 --- a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml @@ -120,6 +120,14 @@ properties: items: - const: top + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + ports: $ref: /schemas/graph.yaml#/properties/ports @@ -160,6 +168,8 @@ required: - power-domains - power-domain-names - ports + - vdda-phy-supply + - vdda-pll-supply additionalProperties: false @@ -328,6 +338,9 @@ examples: power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; power-domain-names = "top"; + vdda-phy-supply = <&vreg_l4a_0p88>; + vdda-pll-supply = <&vreg_l1c_1p2>; + ports { #address-cells = <1>; #size-cells = <0>; -- 2.25.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies 2025-10-15 13:01 ` [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies Vikram Sharma @ 2025-10-15 13:30 ` Bryan O'Donoghue 2025-10-15 18:41 ` Vladimir Zapolskiy 1 sibling, 0 replies; 13+ messages in thread From: Bryan O'Donoghue @ 2025-10-15 13:30 UTC (permalink / raw) To: Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Nihal Kumar Gupta On 15/10/2025 14:01, Vikram Sharma wrote: > Add support for vdda-phy-supply and vdda-pll-supply in the QCS8300 > CAMSS binding to reflect camera sensor hardware requirements. > > Co-developed-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> > Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> > Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> > --- > .../bindings/media/qcom,qcs8300-camss.yaml | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml > index 80a4540a22dc..dce0a1fcb10c 100644 > --- a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml > +++ b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml > @@ -120,6 +120,14 @@ properties: > items: > - const: top > > + vdda-phy-supply: > + description: > + Phandle to a regulator supply to PHY core block. > + > + vdda-pll-supply: > + description: > + Phandle to 1.8V regulator supply to PHY refclk pll block. > + > ports: > $ref: /schemas/graph.yaml#/properties/ports > > @@ -160,6 +168,8 @@ required: > - power-domains > - power-domain-names > - ports > + - vdda-phy-supply > + - vdda-pll-supply > > additionalProperties: false > > @@ -328,6 +338,9 @@ examples: > power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; > power-domain-names = "top"; > > + vdda-phy-supply = <&vreg_l4a_0p88>; > + vdda-pll-supply = <&vreg_l1c_1p2>; > + > ports { > #address-cells = <1>; > #size-cells = <0>; This needs a Fixes: tag --- bod ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies 2025-10-15 13:01 ` [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies Vikram Sharma 2025-10-15 13:30 ` Bryan O'Donoghue @ 2025-10-15 18:41 ` Vladimir Zapolskiy 2025-10-15 19:12 ` Bryan O'Donoghue 1 sibling, 1 reply; 13+ messages in thread From: Vladimir Zapolskiy @ 2025-10-15 18:41 UTC (permalink / raw) To: Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Nihal Kumar Gupta, bryan.odonoghue On 10/15/25 16:01, Vikram Sharma wrote: > Add support for vdda-phy-supply and vdda-pll-supply in the QCS8300 > CAMSS binding to reflect camera sensor hardware requirements. What are "camera sensor hardware requirements"? You do add properties to the ISP. > > Co-developed-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> > Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> > Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> > --- > .../bindings/media/qcom,qcs8300-camss.yaml | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml > index 80a4540a22dc..dce0a1fcb10c 100644 > --- a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml > +++ b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml > @@ -120,6 +120,14 @@ properties: > items: > - const: top > > + vdda-phy-supply: > + description: > + Phandle to a regulator supply to PHY core block. What is "PHY core block" here? > + > + vdda-pll-supply: > + description: > + Phandle to 1.8V regulator supply to PHY refclk pll block. This is a copy-paste example of a known to be wrong pattern. If you open a QCS8300 documentation or a schematics of some QCS8300 powered board, can you get a link between the actual pin names and the introduced property? Likely there should be nothing, which resembles "PHY refclk pll block" over there, and thus the description of the property is misleading. Please check other similar and recently added properties, like it's been done if you add a voltage level reference (and that's the only known for sure information), there will be no need to guess the right voltage level. And it's either incorrect in the description above or in the example below. > + > ports: > $ref: /schemas/graph.yaml#/properties/ports > > @@ -160,6 +168,8 @@ required: > - power-domains > - power-domain-names > - ports > + - vdda-phy-supply > + - vdda-pll-supply > > additionalProperties: false > > @@ -328,6 +338,9 @@ examples: > power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; > power-domain-names = "top"; > > + vdda-phy-supply = <&vreg_l4a_0p88>; > + vdda-pll-supply = <&vreg_l1c_1p2>; > + > ports { > #address-cells = <1>; > #size-cells = <0>; -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies 2025-10-15 18:41 ` Vladimir Zapolskiy @ 2025-10-15 19:12 ` Bryan O'Donoghue 2025-10-15 19:20 ` Vladimir Zapolskiy 0 siblings, 1 reply; 13+ messages in thread From: Bryan O'Donoghue @ 2025-10-15 19:12 UTC (permalink / raw) To: Vladimir Zapolskiy, Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Nihal Kumar Gupta On 15/10/2025 19:41, Vladimir Zapolskiy wrote: > On 10/15/25 16:01, Vikram Sharma wrote: >> Add support for vdda-phy-supply and vdda-pll-supply in the QCS8300 >> CAMSS binding to reflect camera sensor hardware requirements. > > What are "camera sensor hardware requirements"? You do add properties > to the ISP. > >> >> Co-developed-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> >> Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> >> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> >> --- >> .../bindings/media/qcom,qcs8300-camss.yaml | 13 +++++++++++++ >> 1 file changed, 13 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/media/qcom,qcs8300- >> camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcs8300- >> camss.yaml >> index 80a4540a22dc..dce0a1fcb10c 100644 >> --- a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml >> +++ b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml >> @@ -120,6 +120,14 @@ properties: >> items: >> - const: top >> + vdda-phy-supply: >> + description: >> + Phandle to a regulator supply to PHY core block. > > What is "PHY core block" here? I mean come on, I think the meaning is clear. >> + >> + vdda-pll-supply: >> + description: >> + Phandle to 1.8V regulator supply to PHY refclk pll block. > > This is a copy-paste example of a known to be wrong pattern. You're right about the name, please align with this commit git show cba308979b012664c7fe7c5baa818fcb68e86363 Thanks for spotting. --- bod ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies 2025-10-15 19:12 ` Bryan O'Donoghue @ 2025-10-15 19:20 ` Vladimir Zapolskiy 0 siblings, 0 replies; 13+ messages in thread From: Vladimir Zapolskiy @ 2025-10-15 19:20 UTC (permalink / raw) To: Bryan O'Donoghue, Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Nihal Kumar Gupta On 10/15/25 22:12, Bryan O'Donoghue wrote: > On 15/10/2025 19:41, Vladimir Zapolskiy wrote: >> On 10/15/25 16:01, Vikram Sharma wrote: >>> Add support for vdda-phy-supply and vdda-pll-supply in the QCS8300 >>> CAMSS binding to reflect camera sensor hardware requirements. >> >> What are "camera sensor hardware requirements"? You do add properties >> to the ISP. >> >>> >>> Co-developed-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> >>> Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> >>> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> >>> --- >>> .../bindings/media/qcom,qcs8300-camss.yaml | 13 +++++++++++++ >>> 1 file changed, 13 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/media/qcom,qcs8300- >>> camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcs8300- >>> camss.yaml >>> index 80a4540a22dc..dce0a1fcb10c 100644 >>> --- a/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml >>> +++ b/Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml >>> @@ -120,6 +120,14 @@ properties: >>> items: >>> - const: top >>> + vdda-phy-supply: >>> + description: >>> + Phandle to a regulator supply to PHY core block. >> >> What is "PHY core block" here? > > I mean come on, I think the meaning is clear. > The meaning is clear, the expressed concern that the given description of the property is very unlikely match the meaning, as well as the description of "PHY refclk pll block" below is the mismatch to the meaning. The misleading information shall be removed. >>> + >>> + vdda-pll-supply: >>> + description: >>> + Phandle to 1.8V regulator supply to PHY refclk pll block. >> >> This is a copy-paste example of a known to be wrong pattern. > > You're right about the name, please align with this commit > > git show cba308979b012664c7fe7c5baa818fcb68e86363 > > Thanks for spotting. > -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss 2025-10-15 13:01 [PATCH v4 0/2] qcom: qcs8300: Add qcs8300 camss support Vikram Sharma 2025-10-15 13:01 ` [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies Vikram Sharma @ 2025-10-15 13:01 ` Vikram Sharma 2025-10-15 18:49 ` Vladimir Zapolskiy 1 sibling, 1 reply; 13+ messages in thread From: Vikram Sharma @ 2025-10-15 13:01 UTC (permalink / raw) To: bryan.odonoghue, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, quic_vikramsa, linux-media, linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio Add changes to support the camera subsystem on the QCS8300. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 171 ++++++++++++++++++++++++++ 1 file changed, 171 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index 8d78ccac411e..acd475555115 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi @@ -4769,6 +4769,177 @@ videocc: clock-controller@abf0000 { #power-domain-cells = <1>; }; + camss: isp@ac78000 { + compatible = "qcom,qcs8300-camss"; + + reg = <0x0 0xac78000 0x0 0x1000>, + <0x0 0xac7a000 0x0 0xf00>, + <0x0 0xac7c000 0x0 0xf00>, + <0x0 0xac84000 0x0 0xf00>, + <0x0 0xac88000 0x0 0xf00>, + <0x0 0xac8c000 0x0 0xf00>, + <0x0 0xac90000 0x0 0xf00>, + <0x0 0xac94000 0x0 0xf00>, + <0x0 0xac9c000 0x0 0x2000>, + <0x0 0xac9e000 0x0 0x2000>, + <0x0 0xaca0000 0x0 0x2000>, + <0x0 0xacac000 0x0 0x400>, + <0x0 0xacad000 0x0 0x400>, + <0x0 0xacae000 0x0 0x400>, + <0x0 0xac4d000 0x0 0xf000>, + <0x0 0xac60000 0x0 0xf000>, + <0x0 0xac85000 0x0 0xd00>, + <0x0 0xac89000 0x0 0xd00>, + <0x0 0xac8d000 0x0 0xd00>, + <0x0 0xac91000 0x0 0xd00>, + <0x0 0xac95000 0x0 0xd00>; + reg-names = "csid_wrapper", + "csid0", + "csid1", + "csid_lite0", + "csid_lite1", + "csid_lite2", + "csid_lite3", + "csid_lite4", + "csiphy0", + "csiphy1", + "csiphy2", + "tpg0", + "tpg1", + "tpg2", + "vfe0", + "vfe1", + "vfe_lite0", + "vfe_lite1", + "vfe_lite2", + "vfe_lite3", + "vfe_lite4"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CORE_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>, + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>, + <&camcc CAM_CC_CPAS_IFE_0_CLK>, + <&camcc CAM_CC_CPAS_IFE_1_CLK>, + <&camcc CAM_CC_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&camcc CAM_CC_ICP_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; + clock-names = "camnoc_axi", + "core_ahb", + "cpas_ahb", + "cpas_fast_ahb_clk", + "cpas_vfe_lite", + "cpas_vfe0", + "cpas_vfe1", + "csid", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy_rx", + "gcc_axi_hf", + "gcc_axi_sf", + "icp_ahb", + "vfe0", + "vfe0_fast_ahb", + "vfe1", + "vfe1_fast_ahb", + "vfe_lite", + "vfe_lite_ahb", + "vfe_lite_cphy_rx", + "vfe_lite_csid"; + + interrupts = <GIC_SPI 565 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 564 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 759 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 758 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 604 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 545 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 546 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 547 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 761 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 760 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 605 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "csid0", + "csid1", + "csid_lite0", + "csid_lite1", + "csid_lite2", + "csid_lite3", + "csid_lite4", + "csiphy0", + "csiphy1", + "csiphy2", + "tpg0", + "tpg1", + "tpg2", + "vfe0", + "vfe1", + "vfe_lite0", + "vfe_lite1", + "vfe_lite2", + "vfe_lite3", + "vfe_lite4"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "ahb", + "hf_0"; + + iommus = <&apps_smmu 0x2400 0x20>; + + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; + power-domain-names = "top"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + + port@2 { + reg = <2>; + }; + }; + }; + camcc: clock-controller@ade0000 { compatible = "qcom,qcs8300-camcc"; reg = <0x0 0x0ade0000 0x0 0x20000>; -- 2.25.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss 2025-10-15 13:01 ` [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss Vikram Sharma @ 2025-10-15 18:49 ` Vladimir Zapolskiy 2025-10-15 19:58 ` Bryan O'Donoghue 2025-10-16 5:59 ` Krzysztof Kozlowski 0 siblings, 2 replies; 13+ messages in thread From: Vladimir Zapolskiy @ 2025-10-15 18:49 UTC (permalink / raw) To: Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio, bryan.odonoghue On 10/15/25 16:01, Vikram Sharma wrote: > Add changes to support the camera subsystem on the QCS8300. > > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> > Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qcs8300.dtsi | 171 ++++++++++++++++++++++++++ > 1 file changed, 171 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi > index 8d78ccac411e..acd475555115 100644 > --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi > @@ -4769,6 +4769,177 @@ videocc: clock-controller@abf0000 { > #power-domain-cells = <1>; > }; > > + camss: isp@ac78000 { > + compatible = "qcom,qcs8300-camss"; > + > + reg = <0x0 0xac78000 0x0 0x1000>, > + <0x0 0xac7a000 0x0 0xf00>, > + <0x0 0xac7c000 0x0 0xf00>, > + <0x0 0xac84000 0x0 0xf00>, > + <0x0 0xac88000 0x0 0xf00>, > + <0x0 0xac8c000 0x0 0xf00>, > + <0x0 0xac90000 0x0 0xf00>, > + <0x0 0xac94000 0x0 0xf00>, > + <0x0 0xac9c000 0x0 0x2000>, > + <0x0 0xac9e000 0x0 0x2000>, > + <0x0 0xaca0000 0x0 0x2000>, > + <0x0 0xacac000 0x0 0x400>, > + <0x0 0xacad000 0x0 0x400>, > + <0x0 0xacae000 0x0 0x400>, > + <0x0 0xac4d000 0x0 0xf000>, > + <0x0 0xac60000 0x0 0xf000>, > + <0x0 0xac85000 0x0 0xd00>, > + <0x0 0xac89000 0x0 0xd00>, > + <0x0 0xac8d000 0x0 0xd00>, > + <0x0 0xac91000 0x0 0xd00>, > + <0x0 0xac95000 0x0 0xd00>; > + reg-names = "csid_wrapper", > + "csid0", The list of 'reg-names' is not alphanumerically sorted, this is a newly introduced sorting order pattern of CAMSS 'reg' property values. > + "csid1", > + "csid_lite0", > + "csid_lite1", > + "csid_lite2", > + "csid_lite3", > + "csid_lite4", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "tpg0", > + "tpg1", > + "tpg2", > + "vfe0", > + "vfe1", > + "vfe_lite0", > + "vfe_lite1", > + "vfe_lite2", > + "vfe_lite3", > + "vfe_lite4"; > + > + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, > + <&camcc CAM_CC_CORE_AHB_CLK>, > + <&camcc CAM_CC_CPAS_AHB_CLK>, > + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>, > + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>, > + <&camcc CAM_CC_CPAS_IFE_0_CLK>, > + <&camcc CAM_CC_CPAS_IFE_1_CLK>, > + <&camcc CAM_CC_CSID_CLK>, > + <&camcc CAM_CC_CSIPHY0_CLK>, > + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY1_CLK>, > + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY2_CLK>, > + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, > + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, > + <&gcc GCC_CAMERA_HF_AXI_CLK>, > + <&gcc GCC_CAMERA_SF_AXI_CLK>, > + <&camcc CAM_CC_ICP_AHB_CLK>, > + <&camcc CAM_CC_IFE_0_CLK>, > + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>, > + <&camcc CAM_CC_IFE_1_CLK>, > + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>, > + <&camcc CAM_CC_IFE_LITE_CLK>, > + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, > + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, > + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; > + clock-names = "camnoc_axi", > + "core_ahb", > + "cpas_ahb", > + "cpas_fast_ahb_clk", > + "cpas_vfe_lite", > + "cpas_vfe0", > + "cpas_vfe1", > + "csid", > + "csiphy0", > + "csiphy0_timer", > + "csiphy1", > + "csiphy1_timer", > + "csiphy2", > + "csiphy2_timer", > + "csiphy_rx", > + "gcc_axi_hf", > + "gcc_axi_sf", > + "icp_ahb", Please remove the ICP clock, it has no users in the driver, and if needed, it will be added later on. > + "vfe0", > + "vfe0_fast_ahb", > + "vfe1", > + "vfe1_fast_ahb", > + "vfe_lite", > + "vfe_lite_ahb", > + "vfe_lite_cphy_rx", > + "vfe_lite_csid"; > + > + interrupts = <GIC_SPI 565 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 564 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 759 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 758 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 604 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 545 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 546 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 547 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 761 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 760 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 605 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "csid0", > + "csid1", > + "csid_lite0", > + "csid_lite1", > + "csid_lite2", > + "csid_lite3", > + "csid_lite4", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "tpg0", > + "tpg1", > + "tpg2", > + "vfe0", > + "vfe1", > + "vfe_lite0", > + "vfe_lite1", > + "vfe_lite2", > + "vfe_lite3", > + "vfe_lite4"; > + > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "ahb", > + "hf_0"; > + > + iommus = <&apps_smmu 0x2400 0x20>; > + > + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; > + power-domain-names = "top"; 'power-domain-names' property is redundant, since there is just one power domain. > + > + status = "disabled"; There should be no empty lines between proprties. > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + port@0 { There shall be an empty line before a subnode declaration. > + reg = <0>; > + }; > + > + port@1 { > + reg = <1>; > + }; > + > + port@2 { > + reg = <2>; > + }; > + }; > + }; > + > camcc: clock-controller@ade0000 { > compatible = "qcom,qcs8300-camcc"; > reg = <0x0 0x0ade0000 0x0 0x20000>; -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss 2025-10-15 18:49 ` Vladimir Zapolskiy @ 2025-10-15 19:58 ` Bryan O'Donoghue 2025-10-15 23:21 ` Vladimir Zapolskiy 2025-10-16 5:59 ` Krzysztof Kozlowski 1 sibling, 1 reply; 13+ messages in thread From: Bryan O'Donoghue @ 2025-10-15 19:58 UTC (permalink / raw) To: Vladimir Zapolskiy, Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio On 15/10/2025 19:49, Vladimir Zapolskiy wrote: >> + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; >> + power-domain-names = "top"; > > 'power-domain-names' property is redundant, since there is just one > power domain. Its a required property of the yaml. --- bod ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss 2025-10-15 19:58 ` Bryan O'Donoghue @ 2025-10-15 23:21 ` Vladimir Zapolskiy 0 siblings, 0 replies; 13+ messages in thread From: Vladimir Zapolskiy @ 2025-10-15 23:21 UTC (permalink / raw) To: Bryan O'Donoghue, Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio On 10/15/25 22:58, Bryan O'Donoghue wrote: > On 15/10/2025 19:49, Vladimir Zapolskiy wrote: >>> + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; >>> + power-domain-names = "top"; >> >> 'power-domain-names' property is redundant, since there is just one >> power domain. > > Its a required property of the yaml. > Technically it is not a property of the yaml, but I think I understand what you mean here. As usual since there is no users of the previously written device tree node rules, I believe the documentation is still flexible to be updated to a better shape. -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss 2025-10-15 18:49 ` Vladimir Zapolskiy 2025-10-15 19:58 ` Bryan O'Donoghue @ 2025-10-16 5:59 ` Krzysztof Kozlowski 2025-10-16 9:52 ` Vladimir Zapolskiy 1 sibling, 1 reply; 13+ messages in thread From: Krzysztof Kozlowski @ 2025-10-16 5:59 UTC (permalink / raw) To: Vladimir Zapolskiy, Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio, bryan.odonoghue On 15/10/2025 20:49, Vladimir Zapolskiy wrote: > On 10/15/25 16:01, Vikram Sharma wrote: >> Add changes to support the camera subsystem on the QCS8300. >> >> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> >> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> >> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 171 ++++++++++++++++++++++++++ >> 1 file changed, 171 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >> index 8d78ccac411e..acd475555115 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >> @@ -4769,6 +4769,177 @@ videocc: clock-controller@abf0000 { >> #power-domain-cells = <1>; >> }; >> >> + camss: isp@ac78000 { >> + compatible = "qcom,qcs8300-camss"; >> + >> + reg = <0x0 0xac78000 0x0 0x1000>, >> + <0x0 0xac7a000 0x0 0xf00>, >> + <0x0 0xac7c000 0x0 0xf00>, >> + <0x0 0xac84000 0x0 0xf00>, >> + <0x0 0xac88000 0x0 0xf00>, >> + <0x0 0xac8c000 0x0 0xf00>, >> + <0x0 0xac90000 0x0 0xf00>, >> + <0x0 0xac94000 0x0 0xf00>, >> + <0x0 0xac9c000 0x0 0x2000>, >> + <0x0 0xac9e000 0x0 0x2000>, >> + <0x0 0xaca0000 0x0 0x2000>, >> + <0x0 0xacac000 0x0 0x400>, >> + <0x0 0xacad000 0x0 0x400>, >> + <0x0 0xacae000 0x0 0x400>, >> + <0x0 0xac4d000 0x0 0xf000>, >> + <0x0 0xac60000 0x0 0xf000>, >> + <0x0 0xac85000 0x0 0xd00>, >> + <0x0 0xac89000 0x0 0xd00>, >> + <0x0 0xac8d000 0x0 0xd00>, >> + <0x0 0xac91000 0x0 0xd00>, >> + <0x0 0xac95000 0x0 0xd00>; >> + reg-names = "csid_wrapper", >> + "csid0", > > The list of 'reg-names' is not alphanumerically sorted, this is a newly > introduced sorting order pattern of CAMSS 'reg' property values. Please stop inventing ad-hoc or fake rules. There is no such sorting pattern for this property, which I expressed multiple times. Last time you claimed there is some sorting by "values", now this. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss 2025-10-16 5:59 ` Krzysztof Kozlowski @ 2025-10-16 9:52 ` Vladimir Zapolskiy 2025-10-16 10:39 ` Krzysztof Kozlowski 0 siblings, 1 reply; 13+ messages in thread From: Vladimir Zapolskiy @ 2025-10-16 9:52 UTC (permalink / raw) To: Krzysztof Kozlowski, Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio, bryan.odonoghue On 10/16/25 08:59, Krzysztof Kozlowski wrote: > On 15/10/2025 20:49, Vladimir Zapolskiy wrote: >> On 10/15/25 16:01, Vikram Sharma wrote: >>> Add changes to support the camera subsystem on the QCS8300. >>> >>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> >>> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> >>> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 171 ++++++++++++++++++++++++++ >>> 1 file changed, 171 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >>> index 8d78ccac411e..acd475555115 100644 >>> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi >>> @@ -4769,6 +4769,177 @@ videocc: clock-controller@abf0000 { >>> #power-domain-cells = <1>; >>> }; >>> >>> + camss: isp@ac78000 { >>> + compatible = "qcom,qcs8300-camss"; >>> + >>> + reg = <0x0 0xac78000 0x0 0x1000>, >>> + <0x0 0xac7a000 0x0 0xf00>, >>> + <0x0 0xac7c000 0x0 0xf00>, >>> + <0x0 0xac84000 0x0 0xf00>, >>> + <0x0 0xac88000 0x0 0xf00>, >>> + <0x0 0xac8c000 0x0 0xf00>, >>> + <0x0 0xac90000 0x0 0xf00>, >>> + <0x0 0xac94000 0x0 0xf00>, >>> + <0x0 0xac9c000 0x0 0x2000>, >>> + <0x0 0xac9e000 0x0 0x2000>, >>> + <0x0 0xaca0000 0x0 0x2000>, >>> + <0x0 0xacac000 0x0 0x400>, >>> + <0x0 0xacad000 0x0 0x400>, >>> + <0x0 0xacae000 0x0 0x400>, >>> + <0x0 0xac4d000 0x0 0xf000>, >>> + <0x0 0xac60000 0x0 0xf000>, >>> + <0x0 0xac85000 0x0 0xd00>, >>> + <0x0 0xac89000 0x0 0xd00>, >>> + <0x0 0xac8d000 0x0 0xd00>, >>> + <0x0 0xac91000 0x0 0xd00>, >>> + <0x0 0xac95000 0x0 0xd00>; >>> + reg-names = "csid_wrapper", >>> + "csid0", >> >> The list of 'reg-names' is not alphanumerically sorted, this is a newly >> introduced sorting order pattern of CAMSS 'reg' property values. > > Please stop inventing ad-hoc or fake rules. There is no such sorting > pattern for this property, which I expressed multiple times. Last time > you claimed there is some sorting by "values", now this. > The sorting order above does not resemble the order present on other CAMSS devices, which is the alphanumerical sorting order. The same order is supposed to be kept. -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss 2025-10-16 9:52 ` Vladimir Zapolskiy @ 2025-10-16 10:39 ` Krzysztof Kozlowski 0 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2025-10-16 10:39 UTC (permalink / raw) To: Vladimir Zapolskiy, Vikram Sharma, mchehab, robh, krzk+dt, conor+dt, andersson, konradybcio, hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will Cc: linux-arm-kernel, quic_svankada, linux-media, linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio, bryan.odonoghue On 16/10/2025 11:52, Vladimir Zapolskiy wrote: > The same order is supposed to be kept. > But you do not ask to keep the same order. You asked to sort it by name. That's the problem. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2025-10-16 10:39 UTC | newest] Thread overview: 13+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-10-15 13:01 [PATCH v4 0/2] qcom: qcs8300: Add qcs8300 camss support Vikram Sharma 2025-10-15 13:01 ` [PATCH v4 1/2] dt-bindings: media: qcom,qcs8300-camss: Add missing power supplies Vikram Sharma 2025-10-15 13:30 ` Bryan O'Donoghue 2025-10-15 18:41 ` Vladimir Zapolskiy 2025-10-15 19:12 ` Bryan O'Donoghue 2025-10-15 19:20 ` Vladimir Zapolskiy 2025-10-15 13:01 ` [PATCH v4 2/2] arm64: dts: qcom: qcs8300: Add support for camss Vikram Sharma 2025-10-15 18:49 ` Vladimir Zapolskiy 2025-10-15 19:58 ` Bryan O'Donoghue 2025-10-15 23:21 ` Vladimir Zapolskiy 2025-10-16 5:59 ` Krzysztof Kozlowski 2025-10-16 9:52 ` Vladimir Zapolskiy 2025-10-16 10:39 ` Krzysztof Kozlowski
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