From: Damien Le Moal <dlemoal@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
linux-pci@vger.kernel.org, "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org,
"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
"Wilfred Mallawa" <wilfred.mallawa@wdc.com>,
"Niklas Cassel" <cassel@kernel.org>
Subject: Re: [PATCH v3 12/12] PCI: rockchip-ep: Handle PERST# signal in endpoint mode
Date: Tue, 15 Oct 2024 15:24:30 +0900 [thread overview]
Message-ID: <b4e4718e-d601-4ea2-b5e6-e4e1e778afe3@kernel.org> (raw)
In-Reply-To: <20241012123111.bg6rzxotabkxfchc@thinkpad>
On 10/12/24 21:31, Manivannan Sadhasivam wrote:
> On Fri, Oct 11, 2024 at 06:30:31PM +0900, Damien Le Moal wrote:
>> On 10/10/24 19:49, Manivannan Sadhasivam wrote:
>>>> +static int rockchip_pcie_ep_setup_irq(struct pci_epc *epc)
>>>> +{
>>>> + struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
>>>> + struct rockchip_pcie *rockchip = &ep->rockchip;
>>>> + struct device *dev = rockchip->dev;
>>>> + int ret;
>>>> +
>>>> + if (!rockchip->ep_gpio)
>>>> + return 0;
>>>> +
>>>> + /* PCIe reset interrupt */
>>>> + ep->perst_irq = gpiod_to_irq(rockchip->ep_gpio);
>>>> + if (ep->perst_irq < 0) {
>>>> + dev_err(dev, "No corresponding IRQ for PERST GPIO\n");
>>>> + return ep->perst_irq;
>>>> + }
>>>> +
>>>> + ep->perst_asserted = true;
>>>
>>> How come?
>>
>> Yeah, a bit confusing. This is because the gpio active low / inactive high, so
>> as soon as we enable the IRQ, we are going to get one IRQ even though perst gpio
>> signal has not changed yet.
>
> Which means you are looking for a wrong level! What is the polarity of the
> PERST# gpio in DT?
It is not defined in the default DT with the kernel. I added an overlay file to
define it together with the EP mode. And as I said above, the gpio is active
low. If I reverse that to active high, it does not work.
--
Damien Le Moal
Western Digital Research
next prev parent reply other threads:[~2024-10-15 6:24 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-07 4:12 [PATCH v3 00/12] Damien Le Moal
2024-10-07 4:12 ` [PATCH v3 01/12] PCI: rockchip-ep: Fix address translation unit programming Damien Le Moal
2024-10-10 7:02 ` Manivannan Sadhasivam
2024-10-10 8:41 ` Damien Le Moal
2024-10-10 10:36 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 02/12] PCI: rockchip-ep: Use a macro to define EP controller .align feature Damien Le Moal
2024-10-10 7:03 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 03/12] PCI: rockchip-ep: Improve rockchip_pcie_ep_unmap_addr() Damien Le Moal
2024-10-10 7:09 ` Manivannan Sadhasivam
2024-10-11 8:22 ` Damien Le Moal
2024-10-07 4:12 ` [PATCH v3 04/12] PCI: rockchip-ep: Improve rockchip_pcie_ep_map_addr() Damien Le Moal
2024-10-10 7:13 ` Manivannan Sadhasivam
2024-10-12 9:31 ` Manivannan Sadhasivam
2024-10-12 12:02 ` Damien Le Moal
2024-10-12 12:39 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 05/12] PCI: rockchip-ep: Implement the .map_align() controller operation Damien Le Moal
2024-10-10 2:43 ` kernel test robot
2024-10-10 3:44 ` kernel test robot
2024-10-07 4:12 ` [PATCH v3 06/12] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() memory allocations Damien Le Moal
2024-10-10 7:23 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 07/12] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() MSI-X hiding Damien Le Moal
2024-10-10 7:25 ` Manivannan Sadhasivam
2024-10-10 8:09 ` Manivannan Sadhasivam
2024-10-10 8:37 ` Damien Le Moal
2024-10-11 8:30 ` Damien Le Moal
2024-10-12 12:14 ` Manivannan Sadhasivam
2024-10-11 8:25 ` Damien Le Moal
2024-10-12 12:12 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 08/12] PCI: rockchip-ep: Refactor endpoint link training enable Damien Le Moal
2024-10-10 8:22 ` Manivannan Sadhasivam
2024-10-11 8:45 ` Damien Le Moal
2024-10-07 4:12 ` [PATCH v3 09/12] PCI: rockship-ep: Introduce rockchip_pcie_ep_stop() Damien Le Moal
2024-10-10 8:24 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 10/12] PCI: rockchip-ep: Improve link training Damien Le Moal
2024-10-10 10:35 ` Manivannan Sadhasivam
2024-10-11 8:55 ` Damien Le Moal
2024-10-12 12:16 ` Manivannan Sadhasivam
2024-10-17 0:52 ` Damien Le Moal
2024-10-07 4:12 ` [PATCH v3 11/12] dt-bindings: pci: rockchip,rk3399-pcie-ep: Add ep-gpios property Damien Le Moal
2024-10-07 6:12 ` Krzysztof Kozlowski
2024-10-07 6:50 ` Damien Le Moal
2024-10-07 6:54 ` Krzysztof Kozlowski
2024-10-07 6:58 ` Damien Le Moal
2024-10-07 7:00 ` Krzysztof Kozlowski
2024-10-07 7:22 ` Damien Le Moal
2024-10-07 7:27 ` Manivannan Sadhasivam
2024-10-07 4:12 ` [PATCH v3 12/12] PCI: rockchip-ep: Handle PERST# signal in endpoint mode Damien Le Moal
2024-10-10 4:35 ` kernel test robot
2024-10-10 10:49 ` Manivannan Sadhasivam
2024-10-11 9:30 ` Damien Le Moal
2024-10-12 12:31 ` Manivannan Sadhasivam
2024-10-15 6:24 ` Damien Le Moal [this message]
2024-10-07 4:45 ` [PATCH v3 00/12] Damien Le Moal
2024-10-07 10:02 ` Niklas Cassel
2024-10-07 10:26 ` Damien Le Moal
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