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From: Philipp Zabel <p.zabel@pengutronix.de>
To: "Nancy.Lin" <nancy.lin@mediatek.com>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	wim@linux-watchdog.org,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	linux@roeck-us.net
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Nathan Chancellor <nathan@kernel.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	dri-devel@lists.freedesktop.org, llvm@lists.linux.dev,
	singo.chang@mediatek.com, srv_heupstream@mediatek.com,
	Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [PATCH v17 13/21] drm/mediatek: add display merge async reset control
Date: Mon, 25 Apr 2022 11:58:04 +0200	[thread overview]
Message-ID: <b4f438026fe208f8f6511de34c7e84c8c59d843c.camel@pengutronix.de> (raw)
In-Reply-To: <20220416020749.29010-14-nancy.lin@mediatek.com>

On Sa, 2022-04-16 at 10:07 +0800, Nancy.Lin wrote:
> Add merge async reset control in mtk_merge_stop. Async hw doesn't do self
> reset on each sof signal(start of frame), so need to reset the async to
> clear the hw status for the next merge start.
> 
> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_merge.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> index 9dca145cfb71..177473fa8160 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> @@ -8,6 +8,7 @@
>  #include <linux/of_device.h>
>  #include <linux/of_irq.h>
>  #include <linux/platform_device.h>
> +#include <linux/reset.h>
>  #include <linux/soc/mediatek/mtk-cmdq.h>
>  
> 
> 
> 
>  #include "mtk_drm_ddp_comp.h"
> @@ -79,6 +80,9 @@ void mtk_merge_stop(struct device *dev)
>  	struct mtk_disp_merge *priv = dev_get_drvdata(dev);
>  
> 
> 
> 
>  	mtk_merge_stop_cmdq(dev, NULL);
> +
> +	if (priv->async_clk)
> +		device_reset_optional(dev);

To avoid the overhead of looking up the reset control in the device
tree every time, it would be better to request a reset control during
probe using devm_reset_control_get_optional_exclusive(). Here you'd
just call reset_control_reset().

regards
Philipp

  parent reply	other threads:[~2022-04-25  9:58 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20220416020749.29010-1-nancy.lin@mediatek.com>
     [not found] ` <20220416020749.29010-8-nancy.lin@mediatek.com>
2022-04-22 11:37   ` [PATCH v17 07/21] soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1 Matthias Brugger
     [not found] ` <20220416020749.29010-7-nancy.lin@mediatek.com>
2022-04-22 11:37   ` [PATCH v17 06/21] soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1 Matthias Brugger
     [not found] ` <20220416020749.29010-12-nancy.lin@mediatek.com>
2022-04-22 11:48   ` [PATCH v17 11/21] drm/mediatek: add display merge start/stop API for cmdq support Matthias Brugger
2022-04-25 13:32     ` Chun-Kuang Hu
2022-04-25 15:27       ` Matthias Brugger
     [not found] ` <20220416020749.29010-4-nancy.lin@mediatek.com>
2022-04-25  9:54   ` [PATCH v17 03/21] dt-bindings: mediatek: add ethdr definition for mt8195 Philipp Zabel
     [not found] ` <20220416020749.29010-14-nancy.lin@mediatek.com>
2022-04-25  9:58   ` Philipp Zabel [this message]
     [not found] ` <20220416020749.29010-15-nancy.lin@mediatek.com>
2022-04-25 10:00   ` [PATCH v17 14/21] drm/mediatek: add ETHDR support for MT8195 Philipp Zabel

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