From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0C41C433F5 for ; Mon, 25 Apr 2022 09:58:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234651AbiDYKB0 convert rfc822-to-8bit (ORCPT ); Mon, 25 Apr 2022 06:01:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236396AbiDYKBZ (ORCPT ); Mon, 25 Apr 2022 06:01:25 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1ACB81D309 for ; Mon, 25 Apr 2022 02:58:22 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1nivTq-0000ya-E2; Mon, 25 Apr 2022 11:58:06 +0200 Received: from [2a0a:edc0:0:900:1d::4e] (helo=lupine) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1nivTq-0057XY-CK; Mon, 25 Apr 2022 11:58:04 +0200 Received: from pza by lupine with local (Exim 4.94.2) (envelope-from ) id 1nivTo-00057A-8s; Mon, 25 Apr 2022 11:58:04 +0200 Message-ID: Subject: Re: [PATCH v17 13/21] drm/mediatek: add display merge async reset control From: Philipp Zabel To: "Nancy.Lin" , Rob Herring , Matthias Brugger , Chun-Kuang Hu , wim@linux-watchdog.org, AngeloGioacchino Del Regno , linux@roeck-us.net Cc: David Airlie , Daniel Vetter , Nathan Chancellor , Nick Desaulniers , "jason-jh . lin" , Yongqiang Niu , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, dri-devel@lists.freedesktop.org, llvm@lists.linux.dev, singo.chang@mediatek.com, srv_heupstream@mediatek.com, Project_Global_Chrome_Upstream_Group@mediatek.com Date: Mon, 25 Apr 2022 11:58:04 +0200 In-Reply-To: <20220416020749.29010-14-nancy.lin@mediatek.com> References: <20220416020749.29010-1-nancy.lin@mediatek.com> <20220416020749.29010-14-nancy.lin@mediatek.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT User-Agent: Evolution 3.38.3-1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Sa, 2022-04-16 at 10:07 +0800, Nancy.Lin wrote: > Add merge async reset control in mtk_merge_stop. Async hw doesn't do self > reset on each sof signal(start of frame), so need to reset the async to > clear the hw status for the next merge start. > > Signed-off-by: Nancy.Lin > Reviewed-by: CK Hu > Reviewed-by: AngeloGioacchino Del Regno > --- >  drivers/gpu/drm/mediatek/mtk_disp_merge.c | 4 ++++ >  1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/mediatek/mtk_disp_merge.c > index 9dca145cfb71..177473fa8160 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c > @@ -8,6 +8,7 @@ >  #include >  #include >  #include > +#include >  #include >   > > > >  #include "mtk_drm_ddp_comp.h" > @@ -79,6 +80,9 @@ void mtk_merge_stop(struct device *dev) >   struct mtk_disp_merge *priv = dev_get_drvdata(dev); >   > > > >   mtk_merge_stop_cmdq(dev, NULL); > + > + if (priv->async_clk) > + device_reset_optional(dev); To avoid the overhead of looking up the reset control in the device tree every time, it would be better to request a reset control during probe using devm_reset_control_get_optional_exclusive(). Here you'd just call reset_control_reset(). regards Philipp