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From: Roger Quadros <rogerq@kernel.org>
To: Andrew Lunn <andrew@lunn.ch>, Md Danish Anwar <danishanwar@ti.com>
Cc: "Andrew F. Davis" <afd@ti.com>, Tero Kristo <t-kristo@ti.com>,
	Suman Anna <s-anna@ti.com>, YueHaibing <yuehaibing@huawei.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh+dt@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Jakub Kicinski <kuba@kernel.org>,
	Eric Dumazet <edumazet@google.com>,
	"David S. Miller" <davem@davemloft.net>,
	nm@ti.com, ssantosh@kernel.org, srk@ti.com,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	netdev@vger.kernel.org, linux-omap@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 1/2] dt-bindings: net: Add ICSSG Ethernet Driver bindings
Date: Thu, 5 Jan 2023 13:33:26 +0200	[thread overview]
Message-ID: <b55dec4b-4fd5-71fa-4073-b5793cafdee7@kernel.org> (raw)
In-Reply-To: <Y7Mjx8ZEVEcU2mK8@lunn.ch>

On 02/01/2023 20:34, Andrew Lunn wrote:
> On Mon, Jan 02, 2023 at 03:04:19PM +0200, Roger Quadros wrote:
>>
>>
>> On 23/12/2022 16:28, Andrew Lunn wrote:
>>>> +        ethernet-ports {
>>>> +            #address-cells = <1>;
>>>> +            #size-cells = <0>;
>>>> +            pruss2_emac0: port@0 {
>>>> +                reg = <0>;
>>>> +                phy-handle = <&pruss2_eth0_phy>;
>>>> +                phy-mode = "rgmii-rxid";
>>>
>>> That is unusual. Where are the TX delays coming from?
>>
>> >From the below property
>>
>> +                ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
>>
>> The TX delay can be enabled/disabled from within the ICSSG block.
>>
>> If this property exists and PHY mode is neither PHY_INTERFACE_MODE_RGMII_ID
>> nor PHY_INTERFACE_MODE_RGMII_TXID then the internal delay is enabled.
>>
>> This logic is in prueth_config_rgmiidelay() function in the introduced driver.
> 
> What nearly every other MAC driver does is pass the phy-mode to the
> PHY and lets the PHY add the delays. I would recommend you do that,
> rather than be special and different.


If I remember right we couldn't disable MAC TX delay on some earlier silicon
so had to take this route. I don't remember why we couldn't disable it though.

In more recent Silicon Manuals I do see that MAC TX delay can be enabled/disabled.
If this really is the case then we should change to

 phy-mode = "rgmii-id";

And let PHY handle the TX+RX delays.

Danish,
could you please make the change and test if it works on current silicon?

cheers,
-roger

  reply	other threads:[~2023-01-05 11:33 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-23 11:09 [PATCH v3 0/2] Introduce ICSSG based ethernet Driver MD Danish Anwar
2022-12-23 11:09 ` [PATCH v3 1/2] dt-bindings: net: Add ICSSG Ethernet Driver bindings MD Danish Anwar
2022-12-23 11:31   ` Krzysztof Kozlowski
2023-02-01 11:10     ` [EXTERNAL] " Md Danish Anwar
2022-12-23 14:28   ` Andrew Lunn
2023-01-02 13:04     ` Roger Quadros
2023-01-02 18:34       ` Andrew Lunn
2023-01-05 11:33         ` Roger Quadros [this message]
2023-01-05 17:13           ` Andrew Lunn
2023-01-06 11:15             ` Roger Quadros
2023-01-30  7:02           ` [EXTERNAL] " Md Danish Anwar
2022-12-23 11:09 ` [PATCH v3 2/2] net: ti: icssg-prueth: Add ICSSG ethernet driver MD Danish Anwar
2022-12-23 11:32   ` Krzysztof Kozlowski
2023-01-02 12:55     ` Roger Quadros

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