[PATCH 0/2] ARM: dts: socfpga: Add support for PMU on Arria5/Cyclone5

[PATCH 0/2] ARM: dts: socfpga: Add support for PMU on Arria5/Cyclone5

[Florian Vaussard]

Hi,

These patches add suport for ARM Performance Monitor Units on Arria5 and
Cyclone5 SoCFPGA. This was tested on a Cyclone 5 SoC DK board.

Side note: the same change can be probably applied to Arria10 as well,
but we do not have the hardware here to test.

Regards,
Florian

Florian Vaussard (2):
  ARM: dts: socfpga: Add labels for CPU nodes
  ARM: dts: socfpga: Add support for PMU

 arch/arm/boot/dts/socfpga.dtsi | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

-- 
2.7.4

[PATCH 1/2] ARM: dts: socfpga: Add labels for CPU nodes

[Florian Vaussard]

This makes it easier to reference the CPU nodes afterwards.

Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
---
 arch/arm/boot/dts/socfpga.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 2c43c4d..478047e 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -38,13 +38,13 @@
 		#size-cells = <0>;
 		enable-method = "altr,socfpga-smp";
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
 			reg = <0>;
 			next-level-cache = <&L2>;
 		};
-		cpu@1 {
+		cpu1: cpu@1 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
 			reg = <1>;
-- 
2.7.4

[PATCH 2/2] ARM: dts: socfpga: Add support for PMU

[Florian Vaussard]

The dual Cortex-A9 MPCore inside socfpga has a standard PMU unit for
each core mapped in the DAP memory space. Add support for it!

Tested with perf on a Cyclone 5 SoC DK.

Reported-by: Alberto Dassatti <alberto.dassatti@heig-vd.ch>
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Tested-by: Alberto Dassatti <alberto.dassatti@heig-vd.ch>
---
 arch/arm/boot/dts/socfpga.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 478047e..a892de9 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -52,6 +52,15 @@
 		};
 	};
 
+	pmu: pmu@ff111000 {
+		compatible = "arm,cortex-a9-pmu";
+		interrupt-parent = <&intc>;
+		interrupts = <0 176 4>, <0 177 4>;
+		interrupt-affinity = <&cpu0>, <&cpu1>;
+		reg = <0xff111000 0x1000>,
+		      <0xff113000 0x1000>;
+	};
+
 	intc: intc@fffed000 {
 		compatible = "arm,cortex-a9-gic";
 		#interrupt-cells = <3>;
-- 
2.7.4

Re: [PATCH 0/2] ARM: dts: socfpga: Add support for PMU on Arria5/Cyclone5

[Dinh Nguyen]

On 02/28/2017 09:52 AM, Florian Vaussard wrote:
> Hi,
> 
> These patches add suport for ARM Performance Monitor Units on Arria5 and
> Cyclone5 SoCFPGA. This was tested on a Cyclone 5 SoC DK board.
> 
> Side note: the same change can be probably applied to Arria10 as well,
> but we do not have the hardware here to test.
> 
> Regards,
> Florian
> 
> Florian Vaussard (2):
>   ARM: dts: socfpga: Add labels for CPU nodes
>   ARM: dts: socfpga: Add support for PMU
> 
>  arch/arm/boot/dts/socfpga.dtsi | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
> 

Applied!

Thanks,

Dinh

Re: [PATCH 0/2] ARM: dts: socfpga: Add support for PMU on Arria5/Cyclone5

[Marek Vasut]

On 03/08/2017 04:19 PM, Dinh Nguyen wrote:
> 
> 
> On 02/28/2017 09:52 AM, Florian Vaussard wrote:
>> Hi,
>>
>> These patches add suport for ARM Performance Monitor Units on Arria5 and
>> Cyclone5 SoCFPGA. This was tested on a Cyclone 5 SoC DK board.
>>
>> Side note: the same change can be probably applied to Arria10 as well,
>> but we do not have the hardware here to test.
>>
>> Regards,
>> Florian
>>
>> Florian Vaussard (2):
>>   ARM: dts: socfpga: Add labels for CPU nodes
>>   ARM: dts: socfpga: Add support for PMU
>>
>>  arch/arm/boot/dts/socfpga.dtsi | 13 +++++++++++--
>>  1 file changed, 11 insertions(+), 2 deletions(-)
>>
> 
> Applied!

I have to wonder how this was tested. I tried this on 4.14.y, but when I
do "perf record -e cycles", I get no samples. Moreover, when I check the
PMU interrupts, "grep pmu /proc/interrupts", it shows 0 interrupts from
the ARM PMU all the time.

Why am I not getting any PMU interrupts when using perf ?

-- 
Best regards,
Marek Vasut