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Mon, 05 Dec 2022 10:09:47 -0800 (PST) Received: from [192.168.31.208] ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id a2-20020a19ca02000000b004946a1e045fsm2175600lfg.197.2022.12.05.10.09.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 05 Dec 2022 10:09:47 -0800 (PST) Message-ID: Date: Mon, 5 Dec 2022 19:09:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH v4 13/13] arm64: dts: qcom: sa8295-adp: Enable DP instances To: Bjorn Andersson , Dmitry Baryshkov Cc: Rob Clark , Abhinav Kumar , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Kalyan Thota , Jessica Zhang , Kuogee Hsieh , Johan Hovold , Sankeerth Billakanti , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20221205174433.16847-1-quic_bjorande@quicinc.com> <20221205174433.16847-14-quic_bjorande@quicinc.com> From: Konrad Dybcio In-Reply-To: <20221205174433.16847-14-quic_bjorande@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 05/12/2022 18:44, Bjorn Andersson wrote: > From: Bjorn Andersson > > The SA8295P ADP has, among other interfaces, six MiniDP connectors which > are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3. > > Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers, > DP PHYs and link them all together. > > Signed-off-by: Bjorn Andersson > Signed-off-by: Bjorn Andersson > --- > > Changes since v3: > - None > > arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 243 ++++++++++++++++++++++- > 1 file changed, 241 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts > index 6c29d7d757e0..d55c8c5304cc 100644 > --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts > +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts > @@ -23,6 +23,90 @@ aliases { > chosen { > stdout-path = "serial0:115200n8"; > }; > + > + dp2-connector { > + compatible = "dp-connector"; > + label = "DP2"; > + type = "mini"; > + > + hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>; > + > + port { > + dp2_connector_in: endpoint { > + remote-endpoint = <&mdss1_dp0_phy_out>; > + }; > + }; > + }; > + > + dp3-connector { > + compatible = "dp-connector"; > + label = "DP3"; > + type = "mini"; > + > + hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; > + > + port { > + dp3_connector_in: endpoint { > + remote-endpoint = <&mdss1_dp1_phy_out>; > + }; > + }; > + }; > + > + edp0-connector { > + compatible = "dp-connector"; > + label = "EDP0"; > + type = "mini"; > + > + hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; > + > + port { > + edp0_connector_in: endpoint { > + remote-endpoint = <&mdss0_dp2_phy_out>; > + }; > + }; > + }; > + > + edp1-connector { > + compatible = "dp-connector"; > + label = "EDP1"; > + type = "mini"; > + > + hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; > + > + port { > + edp1_connector_in: endpoint { > + remote-endpoint = <&mdss0_dp3_phy_out>; > + }; > + }; > + }; > + > + edp2-connector { > + compatible = "dp-connector"; > + label = "EDP2"; > + type = "mini"; > + > + hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; > + > + port { > + edp2_connector_in: endpoint { > + remote-endpoint = <&mdss1_dp2_phy_out>; > + }; > + }; > + }; > + > + edp3-connector { > + compatible = "dp-connector"; > + label = "EDP3"; > + type = "mini"; > + > + hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; > + > + port { > + edp3_connector_in: endpoint { > + remote-endpoint = <&mdss1_dp3_phy_out>; > + }; > + }; > + }; > }; > > &apps_rsc { > @@ -163,13 +247,168 @@ vreg_l7g: ldo7 { > > vreg_l8g: ldo8 { > regulator-name = "vreg_l8g"; > - regulator-min-microvolt = <880000>; > - regulator-max-microvolt = <880000>; > + regulator-min-microvolt = <912000>; > + regulator-max-microvolt = <912000>; > + regulator-initial-mode = ; > + }; > + > + vreg_l11g: ldo11 { > + regulator-name = "vreg_l11g"; > + regulator-min-microvolt = <912000>; > + regulator-max-microvolt = <912000>; > regulator-initial-mode = ; > }; > }; > }; > > +&dispcc0 { > + status = "okay"; > +}; > + > +&dispcc1 { > + status = "okay"; > +}; > + > +&mdss0 { > + status = "okay"; > +}; > + > +&mdss0_dp2 { > + status = "okay"; status should go last. > + > + data-lanes = <0 1 2 3>; > + > + ports { > + port@1 { > + reg = <1>; > + mdss0_dp2_phy_out: endpoint { That's quite a lot of indentation.. couldn't these endpoints be defined in the SoC DT? Konrad > + remote-endpoint = <&edp0_connector_in>; > + }; > + }; > + }; > +}; > + > +&mdss0_dp2_phy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l8g>; > + vdda-pll-supply = <&vreg_l3g>; > +}; > + > +&mdss0_dp3 { > + status = "okay"; > + > + data-lanes = <0 1 2 3>; > + > + ports { > + port@1 { > + reg = <1>; > + mdss0_dp3_phy_out: endpoint { > + remote-endpoint = <&edp1_connector_in>; > + }; > + }; > + }; > +}; > + > +&mdss0_dp3_phy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l8g>; > + vdda-pll-supply = <&vreg_l3g>; > +}; > + > +&mdss1 { > + status = "okay"; > +}; > + > +&mdss1_dp0 { > + status = "okay"; > + > + data-lanes = <0 1 2 3>; > + > + ports { > + port@1 { > + reg = <1>; > + mdss1_dp0_phy_out: endpoint { > + remote-endpoint = <&dp2_connector_in>; > + }; > + }; > + }; > +}; > + > +&mdss1_dp0_phy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l11g>; > + vdda-pll-supply = <&vreg_l3g>; > +}; > + > +&mdss1_dp1 { > + status = "okay"; > + > + data-lanes = <0 1 2 3>; > + > + ports { > + port@1 { > + reg = <1>; > + mdss1_dp1_phy_out: endpoint { > + remote-endpoint = <&dp3_connector_in>; > + }; > + }; > + }; > +}; > + > +&mdss1_dp1_phy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l11g>; > + vdda-pll-supply = <&vreg_l3g>; > +}; > + > +&mdss1_dp2 { > + status = "okay"; > + > + data-lanes = <0 1 2 3>; > + > + ports { > + port@1 { > + reg = <1>; > + mdss1_dp2_phy_out: endpoint { > + remote-endpoint = <&edp2_connector_in>; > + }; > + }; > + }; > +}; > + > +&mdss1_dp2_phy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l11g>; > + vdda-pll-supply = <&vreg_l3g>; > +}; > + > +&mdss1_dp3 { > + status = "okay"; > + > + data-lanes = <0 1 2 3>; > + > + ports { > + port@1 { > + reg = <1>; > + mdss1_dp3_phy_out: endpoint { > + remote-endpoint = <&edp3_connector_in>; > + }; > + }; > + }; > +}; > + > +&mdss1_dp3_phy { > + status = "okay"; > + > + vdda-phy-supply = <&vreg_l11g>; > + vdda-pll-supply = <&vreg_l3g>; > +}; > + > &pcie2a { > perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; > wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;