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Wed, 21 Oct 2026 01:04:17 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6b4030daf5bsm547898a12.6.2026.10.21.01.04.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Oct 2026 01:04:15 -0700 (PDT) Message-ID: Date: Wed, 21 Oct 2026 10:04:10 +0200 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/10] clk: qcom: cpu-8996: move off the ACD leg while the PLL speeds up To: Dmitry Baryshkov Cc: Bjorn Andersson , Abel Vesa , Stephen Boyd , Brian Masney , Jerome Brunet , Joonwoo Park , Imran Khan , Rajendra Nayak , Jeffrey Hugo , Maxime Ripard , Vikash Garodia , Dikshita Agarwal , Bryan O'Donoghue , Mauro Carvalho Chehab , Ilia Lin , Loic Poulain , Konrad Dybcio , Yassine Oudjana , Dmitry Baryshkov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, Christopher Obbard References: <20261019-msm8998-fix-clocks-v1-0-370949e4d8a0@oss.qualcomm.com> <20261019-msm8998-fix-clocks-v1-5-370949e4d8a0@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: Y9eqjuIlMTtiIl7VUQUlqQiMHWp9dd1P X-Proofpoint-ORIG-GUID: Y9eqjuIlMTtiIl7VUQUlqQiMHWp9dd1P X-Authority-Analysis: v=2.4 cv=EuJHPicA c=1 sm=1 tr=0 ts=6ad87202 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=zcdO2QGPM5nA-iYd0ZEA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIxMDAzMSBTYWx0ZWRfX4E6Uhjw/PZYy fwpn1KBjivm+Up2xuG+02p96UoBgiGOOTgjh9jHBg7ZB0/6ad9dqnAjmhSnoBQ0laBd4Yl+cBRc IWfrhS6bg3vP+VZkkD+YsoNXJbW9KA8= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIxMDAzMSBTYWx0ZWRfX/zigZxBbBCPJ 26ZYHAwezbLdh/bQBYb5Jt46tdC3lI26vOaeQTP0VxvQcKV+xoKPWLxwotLFfi/uLKYCZZv33dS dvv88q4MoaUZb0t+26XODmqAhuInnBs9KUX1xH9Qj1UVZoONwb2mXXbmLhRagTqEMPXgRp7LMYo PVwIAK2smU97VNWYpFxjT/d9j1OO2t+hf4HotO7ArmO6RnXFtjYhPJOppzz96Tj7Gad/MvAOiGk kO12f+jkdBDFKkWCeFL0FMHTOdVqNxd1e8GsgRAm160BwiIly4LOYKcDvuQeRJm8dis4i6WL4Lz AzptjTRjqZnah5rmhWAgpCV0pjCIadPoT3EOqWkYUqbdo0853PGOnyErdhC4w4mt7QpbZZewzNb lVUMHR45qNXFI/bGoA5JaFPVimNmfqON81SA1T7Vy7DLbCf5vQEOC+UOQ3mwxdZQpJoGQVYog7C LBd1jm1nA0UIOSGI1Nw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-21_02,2026-10-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 clxscore=1015 spamscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610210031 On 10/20/26 12:10 PM, Dmitry Baryshkov wrote: > On Tue, Oct 20, 2026 at 08:52:49AM +0200, Konrad Dybcio wrote: >> On 10/19/26 3:41 PM, Dmitry Baryshkov wrote: >>> The MSM8996 CPU clusters sometimes run at half the rate they report >>> after going up between two frequencies above 600 MHz, and stay there >>> until the cluster drops below 600 MHz. The PLL, the muxes and the rest >>> of the cluster clock registers are all as expected: it is the ACD that >>> latches at half the rate when the PLL is reprogrammed to a higher rate >>> underneath it, and selecting the ACD leg again clears it. The driver >>> only moves off the ACD leg when going below 600 MHz. [...] > Downstream isn't keeping the main output below 1190.4 either. After > pre_set_rate(), cpu_clk_8996_set_rate() asks the HF mux for the target > rate, which makes mux_set_rate() set the PLL rate and then switch the mux. > So the main output follows the PLL up to new/2, e.g. 1075.2 MHz on the > way to 2150.4 MHz, on every increase above 1190.4 MHz. > > The main difference is where the cluster waits before the PLL moves: downstream > first lowers the PLL to 1190.4 MHz and parks the output at 595.2 MHz, while > this patch parks it at old/2. Both are lower than the target rate. Following > the downstream approach would mean reprogramming the PLL from inside the pmux > notifier while CCF is changing the rate of the same tree, which feels incorrect > to me. Also it wouldn't lower the peak. Acked-by: Konrad Dybcio Konrad