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Sat, 26 Apr 2025 06:17:17 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4408d8d191bsm106573135e9.1.2025.04.26.06.17.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 26 Apr 2025 06:17:16 -0700 (PDT) Message-ID: Date: Sat, 26 Apr 2025 16:17:15 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 09/11] ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support To: Ryan.Wanner@microchip.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com, lee@kernel.org, sre@kernel.org, p.zabel@pengutronix.de Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org References: <354ecd628fdd292d2125570a6b10a93cbecb7706.1744666011.git.Ryan.Wanner@microchip.com> From: Claudiu Beznea Content-Language: en-US In-Reply-To: <354ecd628fdd292d2125570a6b10a93cbecb7706.1744666011.git.Ryan.Wanner@microchip.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, Ryan, On 15.04.2025 00:41, Ryan.Wanner@microchip.com wrote: > From: Ryan Wanner > > Add SRAM, secumod, UDDRC, and DDR3phy to enable support for low power modes. > > Signed-off-by: Ryan Wanner > --- > arch/arm/boot/dts/microchip/sama7d65.dtsi | 35 +++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi > index b6710ccd4c36..8439c6a9e9f2 100644 > --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi > +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi > @@ -47,6 +47,14 @@ slow_xtal: clock-slowxtal { > }; > }; > > + ns_sram: sram@100000 { > + compatible = "mmio-sram"; > + reg = <0x100000 0x20000>; > + ranges; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + > soc { > compatible = "simple-bus"; > ranges; > @@ -58,6 +66,23 @@ sfrbu: sfr@e0008000 { > reg = <0xe0008000 0x20>; > }; > > + securam: sram@e0000800 { > + compatible = "microchip,sama7d65-securam", "atmel,sama5d2-securam", "mmio-sram"; > + reg = <0xe0000800 0x4000>; > + ranges = <0 0xe0000800 0x4000>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; > + #address-cells = <1>; > + #size-cells = <1>; > + no-memory-wc; > + }; > + > + secumod: security-module@e0004000 { > + compatible = "microchip,sama7d65-secumod", "atmel,sama5d2-secumod", "syscon"; > + reg = <0xe0004000 0x4000>; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + These should have be before sfrbu for keeping nodes soted by their address. I'll adjust while applying. Thank you, Claudiu