From: Marc Zyngier <maz@kernel.org>
To: Shawn Guo <shawn.guo@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Maulik Shah <quic_mkshah@quicinc.com>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Sudeep Holla <sudeep.holla@arm.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 1/3] cpuidle: psci: Call cpu_cluster_pm_enter() on the last CPU
Date: Wed, 16 Feb 2022 14:39:26 +0000 [thread overview]
Message-ID: <b690d382d989bd99eaf870e79f63cfb9@kernel.org> (raw)
In-Reply-To: <20220216132830.32490-2-shawn.guo@linaro.org>
On 2022-02-16 13:28, Shawn Guo wrote:
> Make a call to cpu_cluster_pm_enter() on the last CPU going to low
> power
> state (and cpu_cluster_pm_exit() on the firt CPU coming back), so that
> platforms can be notified to set up hardware for getting into the
> cluster
> low power state.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> drivers/cpuidle/cpuidle-psci.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/cpuidle/cpuidle-psci.c
> b/drivers/cpuidle/cpuidle-psci.c
> index b51b5df08450..c748c1a7d7b1 100644
> --- a/drivers/cpuidle/cpuidle-psci.c
> +++ b/drivers/cpuidle/cpuidle-psci.c
> @@ -37,6 +37,7 @@ struct psci_cpuidle_data {
> static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data,
> psci_cpuidle_data);
> static DEFINE_PER_CPU(u32, domain_state);
> static bool psci_cpuidle_use_cpuhp;
> +static atomic_t cpus_in_idle;
>
> void psci_set_domain_state(u32 state)
> {
> @@ -67,6 +68,14 @@ static int __psci_enter_domain_idle_state(struct
> cpuidle_device *dev,
> if (ret)
> return -1;
>
> + if (atomic_inc_return(&cpus_in_idle) == num_online_cpus()) {
> + ret = cpu_cluster_pm_enter();
> + if (ret) {
> + ret = -1;
> + goto dec_atomic;
> + }
> + }
> +
> /* Do runtime PM to manage a hierarchical CPU toplogy. */
> rcu_irq_enter_irqson();
> if (s2idle)
> @@ -88,6 +97,10 @@ static int __psci_enter_domain_idle_state(struct
> cpuidle_device *dev,
> pm_runtime_get_sync(pd_dev);
> rcu_irq_exit_irqson();
>
> + if (atomic_read(&cpus_in_idle) == num_online_cpus())
> + cpu_cluster_pm_exit();
> +dec_atomic:
> + atomic_dec(&cpus_in_idle);
> cpu_pm_exit();
>
> /* Clear the domain state to start fresh when back from idle. */
Is it just me, or does anyone else find it a bit odd that a cpuidle
driver
calls back into the core cpuidle code to generate new events?
Also, why is this PSCI specific? I would assume that the core cpuidle
code
should be responsible for these transitions, not a random cpuidle
driver.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2022-02-16 14:39 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-16 13:28 [PATCH v5 0/3] Add Qualcomm MPM irqchip driver support Shawn Guo
2022-02-16 13:28 ` [PATCH v5 1/3] cpuidle: psci: Call cpu_cluster_pm_enter() on the last CPU Shawn Guo
2022-02-16 14:39 ` Marc Zyngier [this message]
2022-02-17 2:28 ` Shawn Guo
2022-02-16 14:49 ` Sudeep Holla
2022-02-16 15:58 ` Marc Zyngier
2022-02-17 7:31 ` Shawn Guo
2022-02-17 8:52 ` Marc Zyngier
2022-02-17 13:37 ` Shawn Guo
2022-02-19 11:45 ` Shawn Guo
2022-02-16 13:28 ` [PATCH v5 2/3] dt-bindings: interrupt-controller: Add Qualcomm MPM support Shawn Guo
2022-02-17 3:59 ` Rob Herring
2022-02-17 6:54 ` Shawn Guo
2022-02-22 17:11 ` Rob Herring
2022-02-16 13:28 ` [PATCH v5 3/3] irqchip: Add Qualcomm MPM controller driver Shawn Guo
2022-02-16 15:48 ` Marc Zyngier
2022-02-17 13:14 ` Shawn Guo
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