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From: Jaewon Kim <jaewon02.kim@samsung.com>
To: Chanho Park <chanho61.park@samsung.com>,
	'Krzysztof Kozlowski' <krzysztof.kozlowski@linaro.org>,
	'Rob Herring' <robh+dt@kernel.org>,
	'Krzysztof Kozlowski' <krzysztof.kozlowski+dt@linaro.org>,
	'Conor Dooley' <conor+dt@kernel.org>,
	'Alim Akhtar' <alim.akhtar@samsung.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: exynos: add pwm node for exynosautov9-sadk
Date: Fri, 14 Jul 2023 15:10:50 +0900	[thread overview]
Message-ID: <b737369d-b443-26dd-e4a4-b5906b70ec71@samsung.com> (raw)
In-Reply-To: <000401d9b618$59a29d80$0ce7d880$@samsung.com>


On 23. 7. 14. 14:59, Chanho Park wrote:
>>> +			reg = <0x103f0000 0x100>;
>>> +			samsung,pwm-outputs = <0>, <1>, <2>, <3>;
>>> +			#pwm-cells = <3>;
>>> +			clocks = <&xtcxo>;
>> This does not look like correct clock. Are you sure XTCXO goes to PWM?
> Yes. XTXCO is the source clock of the pwm. Unlike any other exynos SoCs, the clock is directly derived from the external OSC.
> Thus, it cannot be controllable such as gating.


Thanks Chanho.

I miss this comment.


>
> Best Regards,
> Chanho Park
>
>

Thanks

Jaewon Kim


  reply	other threads:[~2023-07-14  6:13 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20230714052025epcas2p46d5485a277c9f21ace14300dd9d7b4d8@epcas2p4.samsung.com>
2023-07-14  5:15 ` [PATCH] arm64: dts: exynos: add pwm node for exynosautov9-sadk Jaewon Kim
2023-07-14  5:26   ` Krzysztof Kozlowski
2023-07-14  5:28     ` Jaewon Kim
2023-07-14  5:59     ` Chanho Park
2023-07-14  6:10       ` Jaewon Kim [this message]
2023-07-14  6:29       ` Krzysztof Kozlowski

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