From: Brandon Wyman <bjwyman@gmail.com>
To: Eddie James <eajames@linux.ibm.com>, joel@jms.id.au
Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org,
Alpana Kumari <alpankum@in.ibm.com>,
robh+dt@kernel.org
Subject: Re: [PATCH 18/22] ARM: dts: aspeed: everest: GPIOs support
Date: Wed, 7 Apr 2021 17:19:05 -0500 [thread overview]
Message-ID: <b74fd3a3-53d9-5dfd-f668-476a27f45ed0@gmail.com> (raw)
In-Reply-To: <20210329150020.13632-19-eajames@linux.ibm.com>
On 2021-03-29 10:00, Eddie James wrote:
> From: Alpana Kumari <alpankum@in.ibm.com>
>
> This commit adds support for-
> - Presence GPIOs
> - I2C control GPIOs
> - Op-panel GPIOs (ex PHR)
>
> Signed-off-by: Alpana Kumari <alpankum@in.ibm.com>
> Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Brandon Wyman <bjwyman@gmail.com>
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 297 +++++++++++++++++++
> 1 file changed, 297 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
> index 9e77bbb3e4d1..18a3d65fb67d 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
> @@ -204,6 +204,37 @@ fan3-presence {
> };
> };
>
> +&gpio0 {
> + gpio-line-names =
> + /*A0-A7*/ "","","","","","","","",
> + /*B0-B7*/ "USERSPACE_RSTIND_BUFF","","","","","","","",
> + /*C0-C7*/ "","","","","","","","",
> + /*D0-D7*/ "","","","","","","","",
> + /*E0-E7*/ "","","","","","","","",
> + /*F0-F7*/ "PIN_HOLE_RESET_IN_N","","",
> + "PIN_HOLE_RESET_OUT_N","","","","",
> + /*G0-G7*/ "","","","","","","","",
> + /*H0-H7*/ "","","","","","","","",
> + /*I0-I7*/ "","","","","","","","",
> + /*J0-J7*/ "","","","","","","","",
> + /*K0-K7*/ "","","","","","","","",
> + /*L0-L7*/ "","","","","","","","",
> + /*M0-M7*/ "","","","","","","","",
> + /*N0-N7*/ "","","","","","","","",
> + /*O0-O7*/ "","","","","","","","",
> + /*P0-P7*/ "","","","","","","","",
> + /*Q0-Q7*/ "","","","","","","","",
> + /*R0-R7*/ "","","","","","I2C_FLASH_MICRO_N","","",
> + /*S0-S7*/ "","","","","","","","",
> + /*T0-T7*/ "","","","","","","","",
> + /*U0-U7*/ "","","","","","","","",
> + /*V0-V7*/ "","BMC_3RESTART_ATTEMPT_P","","","","","","",
> + /*W0-W7*/ "","","","","","","","",
> + /*X0-X7*/ "","","","","","","","",
> + /*Y0-Y7*/ "","","","","","","","",
> + /*Z0-Z7*/ "","","","","","","","";
> +};
> +
> &i2c0 {
> status = "okay";
>
> @@ -211,10 +242,276 @@ eeprom@51 {
> compatible = "atmel,24c64";
> reg = <0x51>;
> };
> +
> + pca1: pca9552@62 {
> + compatible = "nxp,pca9552";
> + reg = <0x62>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio-line-names =
> + "presence-ps0",
> + "presence-ps1",
> + "presence-ps2",
> + "presence-ps3",
> + "presence-pdb",
> + "presence-tpm",
> + "", "",
> + "presence-cp0",
> + "presence-cp1",
> + "presence-cp2",
> + "presence-cp3",
> + "presence-dasd",
> + "presence-lcd-op",
> + "presence-base-op",
> + "";
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@01 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> };
>
> &i2c1 {
> status = "okay";
> +
> + pca2: pca9552@61 {
> + compatible = "nxp,pca9552";
> + reg = <0x61>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio-line-names =
> + "presence-cable-card1",
> + "presence-cable-card2",
> + "presence-cable-card3",
> + "presence-cable-card4",
> + "presence-cable-card5",
> + "expander-cable-card1",
> + "expander-cable-card2",
> + "expander-cable-card3",
> + "expander-cable-card4",
> + "expander-cable-card5";
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + };
> +
> + pca3: pca9552@62 {
> + compatible = "nxp,pca9552";
> + reg = <0x62>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio-line-names =
> + "presence-cable-card6",
> + "presence-cable-card7",
> + "presence-cable-card8",
> + "presence-cable-card9",
> + "presence-cable-card10",
> + "presence-cable-card11",
> + "expander-cable-card6",
> + "expander-cable-card7",
> + "expander-cable-card8",
> + "expander-cable-card9",
> + "expander-cable-card10",
> + "expander-cable-card11";
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + };
> +
> };
>
> &i2c2 {
next prev parent reply other threads:[~2021-04-07 22:19 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-29 14:59 [PATCH 00/22] ARM: dts: aspeed: Updates for Rainier and Everest machines Eddie James
2021-03-29 14:59 ` [PATCH 01/22] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Eddie James
2021-03-29 15:00 ` [PATCH 02/22] ARM: dts: aspeed: rainier: Add directly controlled LEDs Eddie James
2021-03-29 15:00 ` [PATCH 03/22] ARM: dts: aspeed: rainier: Add gpio-keys-polled for fans Eddie James
2021-03-29 15:00 ` [PATCH 04/22] ARM: dts: aspeed: rainier: Add additional processor CFAMs Eddie James
2021-03-29 15:00 ` [PATCH 05/22] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Eddie James
2021-03-29 15:00 ` [PATCH 06/22] ARM: dts: aspeed: rainier: Add leds that are off pic16f882 Eddie James
2021-03-29 15:00 ` [PATCH 07/22] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Eddie James
2021-03-29 15:00 ` [PATCH 08/22] ARM: dts: aspeed: rainier: Add leds on optional PCI cable cards Eddie James
2021-03-29 15:00 ` [PATCH 09/22] ARM: dts: aspeed: rainier: Add presence GPIOs Eddie James
2021-03-29 15:00 ` [PATCH 10/22] ARM: dts: aspeed: rainier: Enable fan watchdog Eddie James
2021-03-29 15:00 ` [PATCH 11/22] ARM: dts: aspeed: rainier 4U: Fix fan configuration Eddie James
2021-03-30 0:23 ` kernel test robot
2021-03-29 15:00 ` [PATCH 12/22] ARM: dts: aspeed: Everest: Add I2C components Eddie James
2021-03-29 15:00 ` [PATCH 13/22] ARM: dts: Aspeed: Everest: Add max31785 fan controller device Eddie James
2021-03-29 15:00 ` [PATCH 14/22] ARM: dts: Aspeed: Everest: Add FSI CFAMs and re-number engines Eddie James
2021-03-29 15:00 ` [PATCH 15/22] ARM: dts: Aspeed: Everest: Add pca9552 fan presence Eddie James
2021-04-07 22:34 ` Brandon Wyman
2021-03-29 15:00 ` [PATCH 16/22] ARM: dts: aspeed: everest: Add power supply i2c devices Eddie James
2021-03-29 15:00 ` [PATCH 17/22] ARM: dts: aspeed: everest: Add UCD90320 power sequencer Eddie James
2021-03-29 15:00 ` [PATCH 18/22] ARM: dts: aspeed: everest: GPIOs support Eddie James
2021-04-07 22:19 ` Brandon Wyman [this message]
2021-03-29 15:00 ` [PATCH 19/22] ARM: dts: Aspeed: Everest: Add RTC Eddie James
2021-03-29 15:00 ` [PATCH 20/22] ARM: dts: aspeed: everest: Enable fan watchdog Eddie James
2021-04-08 0:34 ` Andrew Jeffery
2021-03-29 15:00 ` [PATCH 21/22] ARM: dts: aspeed: rainier: Support pass 2 planar Eddie James
2021-03-30 3:57 ` kernel test robot
2021-03-29 15:00 ` [PATCH 22/22] ARM: dts: aspeed: Add Rainier 1S4U machine Eddie James
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b74fd3a3-53d9-5dfd-f668-476a27f45ed0@gmail.com \
--to=bjwyman@gmail.com \
--cc=alpankum@in.ibm.com \
--cc=devicetree@vger.kernel.org \
--cc=eajames@linux.ibm.com \
--cc=joel@jms.id.au \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).