Re: [PATCH 1/2] riscv: dts: spacemit: add pinctrl support for K1 SoC

[Krzysztof Kozlowski <krzk@kernel.org>]

On 19/07/2024 14:21, Yixun Lan wrote:
> SpacemiT's K1 SoC has a pinctrl controller which can be
> modeled using the pinctrl-single driver.
> 
> Signed-off-by: Yixun Lan <dlan@gentoo.org>
> ---
>  arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 1746 ++++++++++++++++++++++++++
>  arch/riscv/boot/dts/spacemit/k1-pinctrl.h    |  220 ++++
>  arch/riscv/boot/dts/spacemit/k1.dtsi         |   14 +
>  3 files changed, 1980 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> new file mode 100644
> index 0000000000000..ad6f171d3ec1f
> --- /dev/null
> +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
> @@ -0,0 +1,1746 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (c) 2022 SpacemiT (Hangzhou) Technology Co. Ltd
> + * Copyright (c) 2024 Yixun Lan <dlan@gentoo.org>
> + */
> +
> +#include "k1-pinctrl.h"
> +
> +&pinctrl {
> +	camera0_pin: camera0-pin {
> +		pinctrl-single,pins = <
> +			K1_PADCONF0(53, 1) /* cam_mclk0 */
> +		>;
> +		pinctrl-single,bias-pullup = PINCTRL_PULLUP(0);
> +		pinctrl-single,bias-pulldown = PINCTRL_PULLDN(1);
> +		pinctrl-single,drive-strength = PINCTRL_1V8_DS(2);
> +	};
> +
> +	camera1_pin: camera1-pin {
> +		pinctrl-single,pins = <
> +			K1_PADCONF0(58, 1) /* cam_mclk1 */
> +		>;
> +		pinctrl-single,bias-pullup = PINCTRL_PULLUP(0);
> +		pinctrl-single,bias-pulldown = PINCTRL_PULLDN(1);
> +		pinctrl-single,drive-strength = PINCTRL_1V8_DS(2);
> +	};

...

> +
> +#endif /* __DT_BINDINGS_K1_PINCTRL_H */
> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> index 0777bf9e01183..2f0c56b06d413 100644
> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> @@ -416,6 +416,20 @@ uart9: serial@d4017800 {
>  			status = "disabled";
>  		};
>  
> +		pinctrl: pinctrl@d401e000 {
> +			compatible = "pinconf-single";

Please don't. This results in huge code in DTS mapping hardware
registers, basically what once SoC platform did some time ago for clocks
(one clock per node). That is not maintainable, not readable and does
not reduce amount of work. Quite contrary - due to nature of DTS
language, you have huge duplication of code.

Define proper pin controller driver.

Best regards,
Krzysztof