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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Vyacheslav Yurkov <uvv.mail@gmail.com>, Conor Dooley <conor@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] dt-bindings: Add clock guard DT description
Date: Thu, 26 Mar 2026 14:49:54 +0100	[thread overview]
Message-ID: <b7a4f719-b605-4d26-a5ef-9ef2ba8d07ec@kernel.org> (raw)
In-Reply-To: <4d575f17-5cd5-495c-99a9-176b3393d54d@gmail.com>

On 26/03/2026 14:39, Vyacheslav Yurkov wrote:
> On 26.03.2026 11:08, Krzysztof Kozlowski wrote:
> 
>>>
>>> DTS example:
>>>     clock_guard: clock_controller_guard {
>>>       compatible = "clock-controller-guard";
>>>       #clock-cells = <1>;
>>>       clocks = <&h2f_clk 0>, <&clk_fgpa_rx 0>, <clk_fpga_tx 0>;
>>>       clock-names = "h2f_clk0", "clk_fpga_rx", "clk_fpga_tx";
>>>       gpios = <&fpga_ip 0 GPIO_ACTIVE_HIGH>, <&fpga_ip 1 GPIO_ACTIVE_HIGH>;
>>>       gpio-names = "gpio-input0", "gpio-input1";
>>>       clock-output-names = "clkctrl-guard";
>>>     };
>>>
>>>     custom_device {
>>>       compatible = "...";
>>>       ...
>>>       #clock-cells = <1>;
>>>       clocks = <&clock_guard 0>;
>>>       clock-names = "clock-guard";
>>>     };
>>
>> So a pure SW construct? Device has specific clock inputs but you do not
>> model them and instead replace with one fake-guard-input.
>>
>> I don't see how this represents the hardware at all.
>>
>> Maybe some diagrams would help, assuming we still talk about hardware.
>>
>> Best regards,
>> Krzysztof
> 
> Techincally that's correct, it's a software construct. If this is not a 
> right place to submit such a helper driver, I'd appreciate a hint what 
> subsystem is the right one.
> 
> I was not sure how to provide a diagram in the mailing list, so I posted 
> in on Github https://github.com/OSS-Keepers/clock-controller-guard/issues/1

Diagram of hardware. We talk here about hardware.

> 
> It is a driver which models dependencies for other drivers. These are 
> soft or "indirect" dependencies, because we cannot access the FPGA 
> unless the FPGA_PLL_locked, and GPIO is telling us we are good to go.

DT is not for drivers. It's not about subsystem, but concept. DT
describes hardware.

Certain generic bindings which solve real and common hardware problems
are accepted, but so far I miss what hardware problem are you solving here.

Best regards,
Krzysztof

  reply	other threads:[~2026-03-26 13:49 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-18 17:43 [PATCH 0/2] A proposal to add a virtual clock controller guard Vyacheslav Yurkov via B4 Relay
2026-03-18 17:43 ` [PATCH 1/2] clk: Add " Vyacheslav Yurkov via B4 Relay
2026-03-19  8:15   ` kernel test robot
2026-03-18 17:43 ` [PATCH 2/2] dt-bindings: Add clock guard DT description Vyacheslav Yurkov via B4 Relay
2026-03-18 19:33   ` Rob Herring (Arm)
2026-03-18 22:55   ` Rob Herring
2026-03-19  5:50     ` Vyacheslav Yurkov
2026-03-19 16:50       ` Conor Dooley
2026-03-23 13:52         ` Vyacheslav Yurkov
2026-03-23 20:14           ` Conor Dooley
2026-03-26  9:54             ` Vyacheslav Yurkov
2026-03-26 10:08               ` Krzysztof Kozlowski
2026-03-26 13:39                 ` Vyacheslav Yurkov
2026-03-26 13:49                   ` Krzysztof Kozlowski [this message]
2026-03-26 18:32                   ` Conor Dooley
2026-03-28  2:58                     ` Vyacheslav Yurkov
2026-03-26 10:44               ` Conor Dooley

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