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From: "Andrew Jeffery" <andrew@aj.id.au>
To: "Billy Tsai" <billy_tsai@aspeedtech.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Joel Stanley" <joel@jms.id.au>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Cc: BMC-SW@aspeedtech.com
Subject: Re: [RESEND PATCH] ARM: dts: aspeed-g6: Fix gpio memory region
Date: Thu, 01 Oct 2020 09:42:34 +0930	[thread overview]
Message-ID: <b7bcc925-b0da-446f-84a7-1a564a1f4f83@www.fastmail.com> (raw)
In-Reply-To: <20200930090603.19891-1-billy_tsai@aspeedtech.com>

Hi Billy,

On Wed, 30 Sep 2020, at 18:36, Billy Tsai wrote:
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
> ---
>  arch/arm/boot/dts/aspeed-g6.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index 97ca743363d7..b9ec8b579f73 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -357,7 +357,7 @@
>  				#gpio-cells = <2>;
>  				gpio-controller;
>  				compatible = "aspeed,ast2600-gpio";
> -				reg = <0x1e780000 0x800>;
> +				reg = <0x1e780000 0x500>;

We took the 0x800 value from the memory space layout table in the datasheet for 
the 2600. Should that be updated too? Or are you just limiting the region to 
the registers currently described rather than the allocated address space?

Cheers,

Andrew

  reply	other threads:[~2020-10-01  0:21 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-30  5:11 [PATCH] ARM: dts: aspeed-g6: Add sgpiom/sgpios node Billy Tsai
2020-09-30  9:06 ` [RESEND PATCH] ARM: dts: aspeed-g6: Fix gpio memory region Billy Tsai
2020-10-01  0:12   ` Andrew Jeffery [this message]
2020-10-01  0:32     ` Andrew Jeffery
2020-10-01  1:11       ` Ryan Chen
2020-10-01  0:36 ` [PATCH] ARM: dts: aspeed-g6: Add sgpiom/sgpios node Andrew Jeffery
2020-10-05  1:55   ` Billy Tsai

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