From: Archit Taneja <architt@codeaurora.org>
To: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Cyprian Wronka <cwronka@cadence.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Simon Hatliff <hatliff@cadence.com>,
Tomi Valkeinen <tomi.valkeinen@ti.com>,
dri-devel@lists.freedesktop.org,
Alan Douglas <adouglas@cadence.com>,
Rob Herring <robh+dt@kernel.org>, Jyri Sarha <jsarha@ti.com>,
Kumar Gala <galak@codeaurora.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Richard Sproul <sproul@cadence.com>,
Neil Webb <neilw@cadence.com>
Subject: Re: [PATCH v3 1/2] drm/bridge: Add Cadence DSI driver
Date: Wed, 11 Oct 2017 15:43:15 +0530 [thread overview]
Message-ID: <b7c0b92e-83e6-0005-2d55-02615292e9ee@codeaurora.org> (raw)
In-Reply-To: <20171011112602.15a7817d@bbrezillon>
On 10/11/2017 02:56 PM, Boris Brezillon wrote:
> Hi Archit,
>
> On Thu, 7 Sep 2017 15:06:13 +0530
> Archit Taneja <architt@codeaurora.org> wrote:
>
>>
>>> +
>>> +static void cdns_dsi_bridge_disable(struct drm_bridge *bridge)
>>> +{
>>> + struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge);
>>> + struct cdns_dsi *dsi = input_to_dsi(input);
>>> + u32 val;
>>> +
>>> + val = readl(dsi->regs + MCTL_MAIN_DATA_CTL);
>>> + val &= ~(IF_VID_SELECT_MASK | IF_VID_MODE | VID_EN | HOST_EOT_GEN |
>>> + DISP_EOT_GEN);
>>
>> I see some truncation related sparse warnings here and a couple of other places
>> when building against arm32. Those would be nice to fix.
>
> I had a look and it seems to happen everytime I use GENMASK() (the
> truncation is harmless, but sparse complains).
> If you don't mind, I'd prefer to keep GENMASK() rather than manually
> defining masks, but maybe you have an idea how to fix these warnings
> without getting rid of GENMASK().
I don't know either. Let's live with the warnings for now.
Thanks,
Archit
>
>>
>>> + writel(val, dsi->regs + MCTL_MAIN_DATA_CTL);
>>> +
>>> + val = readl(dsi->regs + MCTL_MAIN_EN) & ~IF_EN(input->id);
>>> + writel(val, dsi->regs + MCTL_MAIN_EN);
>>> +}
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
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next prev parent reply other threads:[~2017-10-11 10:13 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20170831155543epcas2p3003246c8d124c032c513a5fed2792992@epcas2p3.samsung.com>
2017-08-31 15:55 ` [PATCH v3 1/2] drm/bridge: Add Cadence DSI driver Boris Brezillon
2017-08-31 15:55 ` [PATCH v3 2/2] dt-bindings: drm/bridge: Document Cadence DSI bridge bindings Boris Brezillon
[not found] ` <20170831155519.3704-2-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-09-01 6:28 ` Andrzej Hajda
[not found] ` <3371dbd2-9539-d746-0982-71112d5d98a0-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2017-09-01 7:06 ` Boris Brezillon
2017-09-01 7:26 ` Andrzej Hajda
2017-09-12 16:03 ` Rob Herring
[not found] ` <20170831155519.3704-1-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-08-31 17:03 ` [PATCH v3 1/2] drm/bridge: Add Cadence DSI driver Eric Anholt
2017-09-01 6:20 ` Boris Brezillon
2017-09-01 18:32 ` Eric Anholt
2017-09-01 7:51 ` Andrzej Hajda
[not found] ` <6404fb07-9c42-78bf-f76e-e7aa1abf5549-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2017-09-01 8:09 ` Boris Brezillon
2017-09-07 9:36 ` Archit Taneja
2017-09-18 9:06 ` Boris Brezillon
[not found] ` <c17e158a-3e37-8ae6-e31c-7ed89429166a-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-10-11 9:26 ` Boris Brezillon
2017-10-11 10:13 ` Archit Taneja [this message]
2017-09-19 12:59 ` Tomi Valkeinen
2017-09-19 13:25 ` Boris Brezillon
2017-09-19 13:38 ` Tomi Valkeinen
2017-09-19 13:48 ` Boris Brezillon
2017-09-19 14:25 ` Tomi Valkeinen
[not found] ` <6cbad342-aac8-d0d4-1d82-26aef33f0e82-l0cyMroinI0@public.gmane.org>
2017-09-20 12:08 ` Boris Brezillon
2017-09-20 11:55 ` Tomi Valkeinen
[not found] ` <27834b62-664f-d403-6396-2339cb4fda1c-l0cyMroinI0@public.gmane.org>
2017-09-20 12:32 ` Boris Brezillon
2017-09-20 12:42 ` Tomi Valkeinen
2017-09-20 12:59 ` Boris Brezillon
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