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From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
To: Conor Dooley <conor@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Chester Lin <chester62515@gmail.com>,
	linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
	devicetree@vger.kernel.org, NXP S32 Linux Team <s32@nxp.com>,
	Christophe Lizzi <clizzi@redhat.com>,
	Alberto Ruiz <aruizrui@redhat.com>,
	Enric Balletbo <eballetb@redhat.com>
Subject: Re: [PATCH 1/2] dt-bindings: linflexuart: add clock definitions
Date: Tue, 24 Sep 2024 17:52:13 +0300	[thread overview]
Message-ID: <b8024c74-f5d7-4b56-96ea-dee5d8dd9a98@oss.nxp.com> (raw)
In-Reply-To: <20240924-twitch-embody-0ffb3ab7fd26@spud>

On 9/24/2024 5:24 PM, Conor Dooley wrote:
> On Tue, Sep 24, 2024 at 05:12:46PM +0300, Ciprian Costea wrote:
>> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>>
>> Add clock definitions for NXP LINFlexD UART bindings
>> and update the binding examples with S32G2 node.
>>
>> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>> ---
>>   .../bindings/serial/fsl,s32-linflexuart.yaml  | 21 +++++++++++++++++++
>>   1 file changed, 21 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml
>> index 4171f524a928..45fcab9e186d 100644
>> --- a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml
>> +++ b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml
>> @@ -34,6 +34,14 @@ properties:
>>     interrupts:
>>       maxItems: 1
>>   
>> +  clocks:
>> +    maxItems: 2
>> +
>> +  clock-names:
>> +    items:
>> +      - const: ipg
>> +      - const: lin
> 
> Can all devices have 2 clocks, or just the s32g2?
> 

Hello Conor,

All devices (S32G2, S32G3 and S32V234) have 2 clocks for LINFlexD module.
They are: "lin" which is the frequency of the baud clock and "ipg" which 
drives the access to the LINFlexD iomapped registers.


Best Regards,
Ciprian

>> +
>>   required:
>>     - compatible
>>     - reg
>> @@ -48,3 +56,16 @@ examples:
>>           reg = <0x40053000 0x1000>;
>>           interrupts = <0 59 4>;
>>       };
>> +
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +    #include <dt-bindings/interrupt-controller/irq.h>
>> +
>> +    serial@401c8000 {
>> +        compatible = "nxp,s32g2-linflexuart",
>> +                     "fsl,s32v234-linflexuart";
>> +        reg = <0x401c8000 0x3000>;
>> +        interrupts = <GIC_SPI 82 IRQ_TYPE_EDGE_RISING>;
>> +        clocks = <&clks 14>, <&clks 13>;
>> +        clock-names = "lin", "ipg";
>> +    };
>> -- 
>> 2.45.2
>>


  reply	other threads:[~2024-09-24 14:53 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-24 14:12 [PATCH 0/2] add NXP LINFlexD UART clock support for S32G2/S32G3 SoC Ciprian Costea
2024-09-24 14:12 ` [PATCH 1/2] dt-bindings: linflexuart: add clock definitions Ciprian Costea
2024-09-24 14:24   ` Conor Dooley
2024-09-24 14:52     ` Ciprian Marian Costea [this message]
2024-09-24 15:01       ` Conor Dooley
2024-09-24 15:17         ` Ciprian Marian Costea
2024-09-24 15:27           ` Conor Dooley
2024-09-24 15:32             ` Ciprian Marian Costea
2024-09-25 14:27               ` Conor Dooley
2024-09-24 14:12 ` [PATCH 2/2] serial: fsl_linflexuart: add clock support Ciprian Costea

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