devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: "Paweł Anikiel" <pan@semihalf.com>
Cc: Alexandru M Stan <amstan@chromium.org>, SoC Team <soc@kernel.org>,
	"moderated list:ARM/Mediatek SoC support" 
	<linux-arm-kernel@lists.infradead.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>,
	Rob Herring <robh+dt@kernel.org>,
	krzysztof.kozlowski+dt@linaro.org,
	Dinh Nguyen <dinguyen@kernel.org>
Subject: Re: [PATCH 2/3] dts: socfpga: Add Google Chameleon v3 devicetree
Date: Tue, 31 May 2022 17:36:18 +0200	[thread overview]
Message-ID: <b8a770fc-d72d-efd2-a7a0-8bfd44308576@linaro.org> (raw)
In-Reply-To: <CAF9_jYR=sjP9wYW9wyfbrVYO4PDYTfMhjvyyh53U3a3+2Zyw=g@mail.gmail.com>

On 31/05/2022 16:47, Paweł Anikiel wrote:
> On Tue, May 31, 2022 at 11:11 AM Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 31/05/2022 03:20, Alexandru M Stan wrote:
>>> Hello Krzysztof
>>>
>>> On Mon, May 30, 2022 at 11:56 AM Krzysztof Kozlowski
>>> <krzysztof.kozlowski@linaro.org> wrote:
>>>>
>>>> On 30/05/2022 15:08, Paweł Anikiel wrote:
>>>>> Add devicetree for the Google Chameleon v3 board.
>>>>>
>>>>> Signed-off-by: Paweł Anikiel <pan@semihalf.com>
>>>>> Signed-off-by: Alexandru M Stan <amstan@chromium.org>
>>>>
>>>> Your SoB chain looks odd. Who did what here?
>>>
>>> Sorry about this.
>>>
>>> It was mainly Pawel but I did some small changes at some point before
>>> it landed in our tree (particularly the GPIOs).
>>
>> Then usually Paweł should be the owner of the patch, not you.
>> Alternatively it could be also co-developed.
>>
>>>
>>>>
>>>>> ---
>>>>>  arch/arm/boot/dts/Makefile                    |  1 +
>>>>>  .../boot/dts/socfpga_arria10_chameleonv3.dts  | 90 +++++++++++++++++++
>>>>>  2 files changed, 91 insertions(+)
>>>>>  create mode 100644 arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>>>>> index 023c8b4ba45c..9417106d3289 100644
>>>>> --- a/arch/arm/boot/dts/Makefile
>>>>> +++ b/arch/arm/boot/dts/Makefile
>>>>> @@ -1146,6 +1146,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
>>>>>       s5pv210-torbreck.dtb
>>>>>  dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \
>>>>>       socfpga_arria5_socdk.dtb \
>>>>> +     socfpga_arria10_chameleonv3.dtb \
>>>>>       socfpga_arria10_socdk_nand.dtb \
>>>>>       socfpga_arria10_socdk_qspi.dtb \
>>>>>       socfpga_arria10_socdk_sdmmc.dtb \
>>>>> diff --git a/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts
>>>>> new file mode 100644
>>>>> index 000000000000..988cc445438e
>>>>> --- /dev/null
>>>>> +++ b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts
>>>>> @@ -0,0 +1,90 @@
>>>>> +// SPDX-License-Identifier: GPL-2.0
>>>>> +/*
>>>>> + * Copyright 2022 Google LLC
>>>>> + */
>>>>> +/dts-v1/;
>>>>> +#include "socfpga_arria10_mercury_aa1.dtsi"
>>>>> +
>>>>> +/ {
>>>>> +     model = "Google Chameleon V3";
>>>>> +     compatible = "google,chameleon-v3",
>>>>
>>>> You miss here enclustra compatible.
>>>
>>> Does this make sense? I don't expect this device tree to boot/work on
>>> an enclustra motherboard. It's only really compatible with a
>>> "chameleon-v3".
>>
>> You also do not expect it to boot on altr,socfpga, do you?
>>
>> If I understood correctly, this board has physically Mercury AA1 SoM, so
>> that compatible should be there.
> 
> Yes, you understood correctly.
> I looked at a similar device - the Cyclone V MCV (SoM) and the MCVEVK
> (base board):
> arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi

This one is clearly incorrect, so using it as example is wrong.

> arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts

Since it is based on wrong MCV, then no wonder it's the same.

> And there is no denx,mcv compatible anywhere, only denx,mcvevk.
> Also, devicetree bindings documentation lists denx,mcvevk under
> "Cyclone 5 boards", and, unless you consider the MCV to be a board,
> there isn't a good place to put denx,mcv (same story with mercury+
> aa1/chameleon).

socfpga are not the best example... upstreaming looks incomplete or even
incorrect, like this case of Enclustra SOM. Much better examples are
FSL-based SoMs. Although some of them are also not in the best shape.

Still someone might prefer to skip SoM compatible arguing that it cannot
be a separate final product. Sure, but also SoC cannot be a separate
product. Having SoM compatible allows to match against it and find
common hardware parts.

In any case you want to remove here parts of bindings (so affect ABI),
to which I do not agree.

>> Let me clarify - please use generic node names, as asked by Devicetree
>> specification (2.2.1. Node Name Requirements). There is also list of
>> some examples in the spec, but you can use some other generic node name.
>>
>> Several bindings also require it.
> 
> Do you mean something like this?
> ssm2603: audio-codec@1a {
> u80: gpio@21 {

Yes.


Best regards,
Krzysztof

  reply	other threads:[~2022-05-31 15:36 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-30 13:08 [PATCH 0/3] Add Chameleon v3 devicetree Paweł Anikiel
2022-05-30 13:08 ` [PATCH 1/3] dts: socfpga: Change Mercury+ AA1 devicetree to header Paweł Anikiel
2022-05-30 18:55   ` Krzysztof Kozlowski
2022-05-31 12:43     ` Paweł Anikiel
2022-05-31 12:59       ` Krzysztof Kozlowski
2022-05-30 13:08 ` [PATCH 2/3] dts: socfpga: Add Google Chameleon v3 devicetree Paweł Anikiel
2022-05-30 18:56   ` Krzysztof Kozlowski
2022-05-31  1:20     ` Alexandru M Stan
2022-05-31  9:11       ` Krzysztof Kozlowski
2022-05-31 14:47         ` Paweł Anikiel
2022-05-31 15:36           ` Krzysztof Kozlowski [this message]
2022-06-01  7:40             ` Paweł Anikiel
2022-05-30 13:08 ` [PATCH 3/3] dt-bindings: altera: Update Arria 10 boards Paweł Anikiel
2022-05-30 18:58   ` Krzysztof Kozlowski

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=b8a770fc-d72d-efd2-a7a0-8bfd44308576@linaro.org \
    --to=krzysztof.kozlowski@linaro.org \
    --cc=amstan@chromium.org \
    --cc=arnd@arndb.de \
    --cc=devicetree@vger.kernel.org \
    --cc=dinguyen@kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=olof@lixom.net \
    --cc=pan@semihalf.com \
    --cc=robh+dt@kernel.org \
    --cc=soc@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).