[PATCH v2 1/2] dt-bindings: riscv: starfive: add Orange Pi RV board compatible

[PATCH v2 1/2] dt-bindings: riscv: starfive: add Orange Pi RV board compatible

[Icenowy Zheng]

Orange Pi RV is a newly released JH7110 board by Xunlong.

Add a compatible string to the starfive platform DT binding.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
No changes in v2.

 Documentation/devicetree/bindings/riscv/starfive.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml
index 7ef85174353de..dd5cd51e38797 100644
--- a/Documentation/devicetree/bindings/riscv/starfive.yaml
+++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
@@ -31,6 +31,7 @@ properties:
               - pine64,star64
               - starfive,visionfive-2-v1.2a
               - starfive,visionfive-2-v1.3b
+              - xunlong,orangepi-rv
           - const: starfive,jh7110
 
 additionalProperties: true
-- 
2.51.0

[PATCH v2 2/2] riscv: dts: starfive: add DT for Orange Pi RV

[Icenowy Zheng]

Orange Pi RV is a newly released SBC with JH7110 SoC, single GbE port
(connected to JH7110 GMAC0 via a YT8531 PHY), 4 USB ports (via a VL805
PCIe USB controller connected to JH7110 PCIE0), a M.2 M-key slot
(connected to JH7110 PCIE1), a HDMI video output, a 3.5mm audio output
and a microSD slot.

Other Onboard peripherals contain a SPI NOR (which contains the U-Boot
firmware), a 24c02 EEPROM storing some StarFive-specific information
(factory programmed and read only by default) and an Ampak AP6256 SDIO
Wi-Fi module.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
---
Changes in v2:
- Property order change mentioned in the review of v1.
- Added Wi-Fi (along with the always on VCC3V3_PCIE regulator, which is
  used to power up WIFI_3V3). The OOB IRQ is still not possible to use
  because of some incompatibility between StarFive pinctrl driver and
  brcmfmac.
- Removed the LED because it's in common DTSI.

 arch/riscv/boot/dts/starfive/Makefile         |  1 +
 .../boot/dts/starfive/jh7110-orangepi-rv.dts  | 87 +++++++++++++++++++
 2 files changed, 88 insertions(+)
 create mode 100644 arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts

diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
index b3bb12f78e7d5..24f1a44828350 100644
--- a/arch/riscv/boot/dts/starfive/Makefile
+++ b/arch/riscv/boot/dts/starfive/Makefile
@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
 
 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-deepcomputing-fml13v01.dtb
 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
+dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-orangepi-rv.dtb
 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
diff --git a/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
new file mode 100644
index 0000000000000..5a917b7db6f78
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2025 Icenowy Zheng <uwu@icenowy.me>
+ */
+
+/dts-v1/;
+#include "jh7110-common.dtsi"
+
+/ {
+	model = "Xunlong Orange Pi RV";
+	compatible = "xunlong,orangepi-rv", "starfive,jh7110";
+
+	/* This regulator is always on by hardware */
+	reg_vcc3v3_pcie: regulator-vcc3v3-pcie {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3-pcie";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&sysgpio 62 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&gmac0 {
+	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
+	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+	starfive,tx-use-rgmii-clk;
+	status = "okay";
+};
+
+&mmc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cap-sd-highspeed;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	vmmc-supply = <&reg_vcc3v3_pcie>;
+	vqmmc-supply = <&vcc_3v3>;
+	status = "okay";
+
+	ap6256: wifi@1 {
+		compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";
+		reg = <1>;
+		/* TODO: out-of-band IRQ on GPIO21 */
+	};
+};
+
+&mmc0_pins {
+	/*
+	 * As the MMC0 bus is used to connect a SDIO Wi-Fi card instead of
+	 * an eMMC card, and the eMMC RST is repurposed to be an enablement
+	 * pin of the SDIO Wi-Fi, remove it from the pinctrl node and manage
+	 * it as a GPIO instead.
+	 */
+	/delete-node/ rst-pins;
+};
+
+&mmc1 {
+	/delete-property/ cd-gpios;
+	broken-cd;
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie1 {
+	status = "okay";
+};
+
+&phy0 {
+	rx-internal-delay-ps = <1500>;
+	tx-internal-delay-ps = <1500>;
+	motorcomm,tx-clk-adj-enabled;
+	motorcomm,tx-clk-10-inverted;
+	motorcomm,tx-clk-100-inverted;
+	motorcomm,tx-clk-1000-inverted;
+	motorcomm,rx-clk-drv-microamp = <3970>;
+	motorcomm,rx-data-drv-microamp = <2910>;
+};
+
+&pwmdac {
+	status = "okay";
+};
-- 
2.51.0

Re: [PATCH v2 2/2] riscv: dts: starfive: add DT for Orange Pi RV

[Icenowy Zheng]

在 2025-09-30星期二的 18:03 +0800，Icenowy Zheng写道：
> Orange Pi RV is a newly released SBC with JH7110 SoC, single GbE port
> (connected to JH7110 GMAC0 via a YT8531 PHY), 4 USB ports (via a
> VL805
> PCIe USB controller connected to JH7110 PCIE0), a M.2 M-key slot
> (connected to JH7110 PCIE1), a HDMI video output, a 3.5mm audio
> output
> and a microSD slot.
> 
> Other Onboard peripherals contain a SPI NOR (which contains the U-
> Boot
> firmware), a 24c02 EEPROM storing some StarFive-specific information
> (factory programmed and read only by default) and an Ampak AP6256
> SDIO
> Wi-Fi module.
> 
> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> ---
> Changes in v2:
> - Property order change mentioned in the review of v1.
> - Added Wi-Fi (along with the always on VCC3V3_PCIE regulator, which
> is
>   used to power up WIFI_3V3). The OOB IRQ is still not possible to
> use
>   because of some incompatibility between StarFive pinctrl driver and
>   brcmfmac.
> - Removed the LED because it's in common DTSI.
> 
>  arch/riscv/boot/dts/starfive/Makefile         |  1 +
>  .../boot/dts/starfive/jh7110-orangepi-rv.dts  | 87
> +++++++++++++++++++
>  2 files changed, 88 insertions(+)
>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-orangepi-
> rv.dts
> 
> diff --git a/arch/riscv/boot/dts/starfive/Makefile
> b/arch/riscv/boot/dts/starfive/Makefile
> index b3bb12f78e7d5..24f1a44828350 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-
> visionfive-v1.dtb
>  
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-deepcomputing-fml13v01.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-orangepi-rv.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
> v1.2a.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
> v1.3b.dtb
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
> b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
> new file mode 100644
> index 0000000000000..5a917b7db6f78
> --- /dev/null
> +++ b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
> @@ -0,0 +1,87 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (C) 2025 Icenowy Zheng <uwu@icenowy.me>
> + */
> +
> +/dts-v1/;
> +#include "jh7110-common.dtsi"
> +
> +/ {
> +       model = "Xunlong Orange Pi RV";
> +       compatible = "xunlong,orangepi-rv", "starfive,jh7110";
> +
> +       /* This regulator is always on by hardware */
> +       reg_vcc3v3_pcie: regulator-vcc3v3-pcie {
> +               compatible = "regulator-fixed";
> +               regulator-name = "vcc3v3-pcie";
> +               regulator-min-microvolt = <3300000>;
> +               regulator-max-microvolt = <3300000>;
> +               regulator-always-on;
> +       };
> +
> +       wifi_pwrseq: wifi-pwrseq {
> +               compatible = "mmc-pwrseq-simple";
> +               reset-gpios = <&sysgpio 62 GPIO_ACTIVE_LOW>;
> +       };
> +};
> +
> +&gmac0 {
> +       assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
> +       assigned-clock-parents = <&aoncrg
> JH7110_AONCLK_GMAC0_RMII_RTX>;
> +       starfive,tx-use-rgmii-clk;
> +       status = "okay";
> +};
> +
> +&mmc0 {
> +       #address-cells = <1>;
> +       #size-cells = <0>;
> +       cap-sd-highspeed;
> +       mmc-pwrseq = <&wifi_pwrseq>;
> +       vmmc-supply = <&reg_vcc3v3_pcie>;
> +       vqmmc-supply = <&vcc_3v3>;
> +       status = "okay";
> +
> +       ap6256: wifi@1 {
> +               compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-
> fmac";
> +               reg = <1>;
> +               /* TODO: out-of-band IRQ on GPIO21 */
> +       };
> +};
> +
> +&mmc0_pins {
> +       /*
> +        * As the MMC0 bus is used to connect a SDIO Wi-Fi card
> instead of
> +        * an eMMC card, and the eMMC RST is repurposed to be an
> enablement
> +        * pin of the SDIO Wi-Fi, remove it from the pinctrl node and
> manage
> +        * it as a GPIO instead.
> +        */
> +       /delete-node/ rst-pins;
> +};
> +
> +&mmc1 {
> +       /delete-property/ cd-gpios;
> +       broken-cd;

Well it's found that the card detect is working, although with
different polarity with other boards.

Here should be:
```
	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_HIGH>;
```

Will be fixed in the next revision.

> +};
> +
> +&pcie0 {
> +       status = "okay";
> +};
> +
> +&pcie1 {
> +       status = "okay";
> +};
> +
> +&phy0 {
> +       rx-internal-delay-ps = <1500>;
> +       tx-internal-delay-ps = <1500>;
> +       motorcomm,tx-clk-adj-enabled;
> +       motorcomm,tx-clk-10-inverted;
> +       motorcomm,tx-clk-100-inverted;
> +       motorcomm,tx-clk-1000-inverted;
> +       motorcomm,rx-clk-drv-microamp = <3970>;
> +       motorcomm,rx-data-drv-microamp = <2910>;
> +};
> +
> +&pwmdac {
> +       status = "okay";
> +};

Re: [PATCH v2 1/2] dt-bindings: riscv: starfive: add Orange Pi RV board compatible

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 52 bytes --]

Acked-by: Conor Dooley <conor.dooley@microchip.com>

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v2 2/2] riscv: dts: starfive: add DT for Orange Pi RV

[E Shattow]

Hi Icenowy,

On 9/30/25 08:51, Icenowy Zheng wrote:
> 在 2025-09-30星期二的 18:03 +0800，Icenowy Zheng写道：
>> Orange Pi RV is a newly released SBC with JH7110 SoC, single GbE port
>> (connected to JH7110 GMAC0 via a YT8531 PHY), 4 USB ports (via a
>> VL805
>> PCIe USB controller connected to JH7110 PCIE0), a M.2 M-key slot
>> (connected to JH7110 PCIE1), a HDMI video output, a 3.5mm audio
>> output
>> and a microSD slot.
>>
>> Other Onboard peripherals contain a SPI NOR (which contains the U-
>> Boot
>> firmware), a 24c02 EEPROM storing some StarFive-specific information
>> (factory programmed and read only by default) and an Ampak AP6256
>> SDIO
>> Wi-Fi module.
>>
>> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
>> ---
>> Changes in v2:
>> - Property order change mentioned in the review of v1.
>> - Added Wi-Fi (along with the always on VCC3V3_PCIE regulator, which
>> is
>>   used to power up WIFI_3V3). The OOB IRQ is still not possible to
>> use
>>   because of some incompatibility between StarFive pinctrl driver and
>>   brcmfmac.
>> - Removed the LED because it's in common DTSI.
>>
>>  arch/riscv/boot/dts/starfive/Makefile         |  1 +
>>  .../boot/dts/starfive/jh7110-orangepi-rv.dts  | 87
>> +++++++++++++++++++
>>  2 files changed, 88 insertions(+)
>>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-orangepi-
>> rv.dts
>>
>> diff --git a/arch/riscv/boot/dts/starfive/Makefile
>> b/arch/riscv/boot/dts/starfive/Makefile
>> index b3bb12f78e7d5..24f1a44828350 100644
>> --- a/arch/riscv/boot/dts/starfive/Makefile
>> +++ b/arch/riscv/boot/dts/starfive/Makefile
>> @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-
>> visionfive-v1.dtb
>>  
>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-deepcomputing-fml13v01.dtb
>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
>> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-orangepi-rv.dtb
>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
>> v1.2a.dtb
>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
>> v1.3b.dtb
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
>> b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
>> new file mode 100644
>> index 0000000000000..5a917b7db6f78
>> --- /dev/null
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
>> @@ -0,0 +1,87 @@
>> +// SPDX-License-Identifier: GPL-2.0 OR MIT
>> +/*
>> + * Copyright (C) 2025 Icenowy Zheng <uwu@icenowy.me>
>> + */
>> +
>> +/dts-v1/;
>> +#include "jh7110-common.dtsi"
>> +
>> +/ {
>> +       model = "Xunlong Orange Pi RV";
>> +       compatible = "xunlong,orangepi-rv", "starfive,jh7110";
>> +
>> +       /* This regulator is always on by hardware */
>> +       reg_vcc3v3_pcie: regulator-vcc3v3-pcie {
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "vcc3v3-pcie";
>> +               regulator-min-microvolt = <3300000>;
>> +               regulator-max-microvolt = <3300000>;
>> +               regulator-always-on;
>> +       };
>> +
>> +       wifi_pwrseq: wifi-pwrseq {
>> +               compatible = "mmc-pwrseq-simple";
>> +               reset-gpios = <&sysgpio 62 GPIO_ACTIVE_LOW>;
>> +       };
>> +};
>> +
>> +&gmac0 {
>> +       assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
>> +       assigned-clock-parents = <&aoncrg
>> JH7110_AONCLK_GMAC0_RMII_RTX>;
>> +       starfive,tx-use-rgmii-clk;
>> +       status = "okay";
>> +};
>> +
>> +&mmc0 {
>> +       #address-cells = <1>;
>> +       #size-cells = <0>;
>> +       cap-sd-highspeed;
>> +       mmc-pwrseq = <&wifi_pwrseq>;
>> +       vmmc-supply = <&reg_vcc3v3_pcie>;
>> +       vqmmc-supply = <&vcc_3v3>;
>> +       status = "okay";
>> +
>> +       ap6256: wifi@1 {
>> +               compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-
>> fmac";
>> +               reg = <1>;
>> +               /* TODO: out-of-band IRQ on GPIO21 */
>> +       };
>> +};
>> +

>> +&mmc0_pins {
>> +       /*
>> +        * As the MMC0 bus is used to connect a SDIO Wi-Fi card
>> instead of
>> +        * an eMMC card, and the eMMC RST is repurposed to be an
>> enablement
>> +        * pin of the SDIO Wi-Fi, remove it from the pinctrl node and
>> manage
>> +        * it as a GPIO instead.
>> +        */
>> +       /delete-node/ rst-pins;
>> +};
>> +

Listed on the schematic [1] as:
Default function SDIO0 RSTn GPIO62 for eMMC:J9
Highlighted (non-default?) function GPIO62 D17 << WIFI_EN_H_GPIO62
WIFI_EN_H_GPIO62 >> WIFI_PWREN (pin 12 WL_REG_ON of module AP6256)

I've sent a patch [2] to portion out mmc0 reset pins from jh7110-common.dtsi

>> +&mmc1 {
>> +       /delete-property/ cd-gpios;
>> +       broken-cd;
> 
> Well it's found that the card detect is working, although with
> different polarity with other boards.
> 
> Here should be:
> ```
> 	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_HIGH>;
> ```
> 
> Will be fixed in the next revision.

Yes, listed on the schematic [1] as:
SD SDIO0 CD GPIO41 for MicroSD:J10

There is not a mention of active high or active low on the schematic
label, however there is listed a 10Kohm pull-up to +Vdd1.833 for the
circuit diagram of the Micro SD Card. The card holder is referenced to
ground and could reasonably be N/O or N/C switch operation depending on
the exact part selected for manufacture.

> 
>> +};
>> +
>> +&pcie0 {
>> +       status = "okay";
>> +};
>> +
>> +&pcie1 {
>> +       status = "okay";
>> +};
>> +

>> +&phy0 {
>> +       rx-internal-delay-ps = <1500>;
>> +       tx-internal-delay-ps = <1500>;
>> +       motorcomm,tx-clk-adj-enabled;
>> +       motorcomm,tx-clk-10-inverted;
>> +       motorcomm,tx-clk-100-inverted;
>> +       motorcomm,tx-clk-1000-inverted;
>> +       motorcomm,rx-clk-drv-microamp = <3970>;
>> +       motorcomm,rx-data-drv-microamp = <2910>;
>> +};

'motorcomm,rx' before 'motorcomm,tx' in `LANG=C sort` of vendor-specific
properties.

>> +
>> +&pwmdac {
>> +       status = "okay";
>> +};
> 
Additional non-default GPIO as listed in the Orange Pi design:
GPIO21 WIFI_WAKE_HOST_H /* default vf2 function PCIE_PWREN_H_GPIO21 */
GPIO22 >> BT_UART_RXD /* default vf2 function MIPI_PWR_EN */
GPIO23 << BT_UART_TXD /* default vf2 function LCD RESET */
GPIO24 << BT_UART_CTS /* default vf2 function MIPI_LCD_BL */
GPIO25 << BT_UART_RTS /* default vf2 function TP_DET_GPIO25 */
GPIO30 << BT_EN_H_GPIO30 /* default vf2 function TP_INT_L */
GPIO31 << BT_WAKE_GPIO31 /* default vf2 function TP_RST_L */

Of all the above, GPIO21 is defined in jh7110-common.dtsi
&pcie1_pins/wake-pins and may need consideration.

There is a note about "PMIC_PWRON as Key" and so does this have the
meaning of it is used as an input device?

Also noted is that the USB over-current circuit appears to be
implemented, different than being absent in other VF2 designs.

1:
http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/service-and-support/Orange-Pi-RV.html
2: https://lore.kernel.org/lkml/20251005174450.1949110-1-e@freeshell.de/

With the card detect describing hardware corrected, and clean up the
vendor property sort, then please confirm if you think GPIO21 is
described correctly.

Acked-by: E Shattow <e@freeshell.de>

Re: [PATCH v2 2/2] riscv: dts: starfive: add DT for Orange Pi RV

[Icenowy Zheng]

在 2025-10-05星期日的 11:47 -0700，E Shattow写道：
> Hi Icenowy,
> 
> On 9/30/25 08:51, Icenowy Zheng wrote:
> > 在 2025-09-30星期二的 18:03 +0800，Icenowy Zheng写道：
> > > Orange Pi RV is a newly released SBC with JH7110 SoC, single GbE
> > > port
> > > (connected to JH7110 GMAC0 via a YT8531 PHY), 4 USB ports (via a
> > > VL805
> > > PCIe USB controller connected to JH7110 PCIE0), a M.2 M-key slot
> > > (connected to JH7110 PCIE1), a HDMI video output, a 3.5mm audio
> > > output
> > > and a microSD slot.
> > > 
> > > Other Onboard peripherals contain a SPI NOR (which contains the
> > > U-
> > > Boot
> > > firmware), a 24c02 EEPROM storing some StarFive-specific
> > > information
> > > (factory programmed and read only by default) and an Ampak AP6256
> > > SDIO
> > > Wi-Fi module.
> > > 
> > > Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> > > ---
> > > Changes in v2:
> > > - Property order change mentioned in the review of v1.
> > > - Added Wi-Fi (along with the always on VCC3V3_PCIE regulator,
> > > which
> > > is
> > >   used to power up WIFI_3V3). The OOB IRQ is still not possible
> > > to
> > > use
> > >   because of some incompatibility between StarFive pinctrl driver
> > > and
> > >   brcmfmac.
> > > - Removed the LED because it's in common DTSI.
> > > 
> > >  arch/riscv/boot/dts/starfive/Makefile         |  1 +
> > >  .../boot/dts/starfive/jh7110-orangepi-rv.dts  | 87
> > > +++++++++++++++++++
> > >  2 files changed, 88 insertions(+)
> > >  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-orangepi-
> > > rv.dts
> > > 
> > > diff --git a/arch/riscv/boot/dts/starfive/Makefile
> > > b/arch/riscv/boot/dts/starfive/Makefile
> > > index b3bb12f78e7d5..24f1a44828350 100644
> > > --- a/arch/riscv/boot/dts/starfive/Makefile
> > > +++ b/arch/riscv/boot/dts/starfive/Makefile
> > > @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-
> > > visionfive-v1.dtb
> > >  
> > >  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-deepcomputing-fml13v01.dtb
> > >  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
> > > +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-orangepi-rv.dtb
> > >  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
> > >  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
> > > v1.2a.dtb
> > >  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
> > > v1.3b.dtb
> > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
> > > b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
> > > new file mode 100644
> > > index 0000000000000..5a917b7db6f78
> > > --- /dev/null
> > > +++ b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
> > > @@ -0,0 +1,87 @@
> > > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > > +/*
> > > + * Copyright (C) 2025 Icenowy Zheng <uwu@icenowy.me>
> > > + */
> > > +
> > > +/dts-v1/;
> > > +#include "jh7110-common.dtsi"
> > > +
> > > +/ {
> > > +       model = "Xunlong Orange Pi RV";
> > > +       compatible = "xunlong,orangepi-rv", "starfive,jh7110";
> > > +
> > > +       /* This regulator is always on by hardware */
> > > +       reg_vcc3v3_pcie: regulator-vcc3v3-pcie {
> > > +               compatible = "regulator-fixed";
> > > +               regulator-name = "vcc3v3-pcie";
> > > +               regulator-min-microvolt = <3300000>;
> > > +               regulator-max-microvolt = <3300000>;
> > > +               regulator-always-on;
> > > +       };
> > > +
> > > +       wifi_pwrseq: wifi-pwrseq {
> > > +               compatible = "mmc-pwrseq-simple";
> > > +               reset-gpios = <&sysgpio 62 GPIO_ACTIVE_LOW>;
> > > +       };
> > > +};
> > > +
> > > +&gmac0 {
> > > +       assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
> > > +       assigned-clock-parents = <&aoncrg
> > > JH7110_AONCLK_GMAC0_RMII_RTX>;
> > > +       starfive,tx-use-rgmii-clk;
> > > +       status = "okay";
> > > +};
> > > +
> > > +&mmc0 {
> > > +       #address-cells = <1>;
> > > +       #size-cells = <0>;
> > > +       cap-sd-highspeed;
> > > +       mmc-pwrseq = <&wifi_pwrseq>;
> > > +       vmmc-supply = <&reg_vcc3v3_pcie>;
> > > +       vqmmc-supply = <&vcc_3v3>;
> > > +       status = "okay";
> > > +
> > > +       ap6256: wifi@1 {
> > > +               compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-
> > > fmac";
> > > +               reg = <1>;
> > > +               /* TODO: out-of-band IRQ on GPIO21 */
> > > +       };
> > > +};
> > > +
> 
> > > +&mmc0_pins {
> > > +       /*
> > > +        * As the MMC0 bus is used to connect a SDIO Wi-Fi card
> > > instead of
> > > +        * an eMMC card, and the eMMC RST is repurposed to be an
> > > enablement
> > > +        * pin of the SDIO Wi-Fi, remove it from the pinctrl node
> > > and
> > > manage
> > > +        * it as a GPIO instead.
> > > +        */
> > > +       /delete-node/ rst-pins;
> > > +};
> > > +
> 
> Listed on the schematic [1] as:
> Default function SDIO0 RSTn GPIO62 for eMMC:J9
> Highlighted (non-default?) function GPIO62 D17 << WIFI_EN_H_GPIO62
> WIFI_EN_H_GPIO62 >> WIFI_PWREN (pin 12 WL_REG_ON of module AP6256)
> 
> I've sent a patch [2] to portion out mmc0 reset pins from jh7110-
> common.dtsi
> 
> > > +&mmc1 {
> > > +       /delete-property/ cd-gpios;
> > > +       broken-cd;
> > 
> > Well it's found that the card detect is working, although with
> > different polarity with other boards.
> > 
> > Here should be:
> > ```
> >         cd-gpios = <&sysgpio 41 GPIO_ACTIVE_HIGH>;
> > ```
> > 
> > Will be fixed in the next revision.
> 
> Yes, listed on the schematic [1] as:
> SD SDIO0 CD GPIO41 for MicroSD:J10
> 
> There is not a mention of active high or active low on the schematic
> label, however there is listed a 10Kohm pull-up to +Vdd1.833 for the
> circuit diagram of the Micro SD Card. The card holder is referenced
> to
> ground and could reasonably be N/O or N/C switch operation depending
> on
> the exact part selected for manufacture.
> 
> > 
> > > +};
> > > +
> > > +&pcie0 {
> > > +       status = "okay";
> > > +};
> > > +
> > > +&pcie1 {
> > > +       status = "okay";
> > > +};
> > > +
> 
> > > +&phy0 {
> > > +       rx-internal-delay-ps = <1500>;
> > > +       tx-internal-delay-ps = <1500>;
> > > +       motorcomm,tx-clk-adj-enabled;
> > > +       motorcomm,tx-clk-10-inverted;
> > > +       motorcomm,tx-clk-100-inverted;
> > > +       motorcomm,tx-clk-1000-inverted;
> > > +       motorcomm,rx-clk-drv-microamp = <3970>;
> > > +       motorcomm,rx-data-drv-microamp = <2910>;
> > > +};
> 
> 'motorcomm,rx' before 'motorcomm,tx' in `LANG=C sort` of vendor-
> specific
> properties.
> 
> > > +
> > > +&pwmdac {
> > > +       status = "okay";
> > > +};
> > 
> Additional non-default GPIO as listed in the Orange Pi design:
> GPIO21 WIFI_WAKE_HOST_H /* default vf2 function PCIE_PWREN_H_GPIO21
> */
> GPIO22 >> BT_UART_RXD /* default vf2 function MIPI_PWR_EN */
> GPIO23 << BT_UART_TXD /* default vf2 function LCD RESET */
> GPIO24 << BT_UART_CTS /* default vf2 function MIPI_LCD_BL */
> GPIO25 << BT_UART_RTS /* default vf2 function TP_DET_GPIO25 */
> GPIO30 << BT_EN_H_GPIO30 /* default vf2 function TP_INT_L */
> GPIO31 << BT_WAKE_GPIO31 /* default vf2 function TP_RST_L */
> 
> Of all the above, GPIO21 is defined in jh7110-common.dtsi
> &pcie1_pins/wake-pins and may need consideration.
> 
> There is a note about "PMIC_PWRON as Key" and so does this have the
> meaning of it is used as an input device?
> 
> Also noted is that the USB over-current circuit appears to be
> implemented, different than being absent in other VF2 designs.
> 
> 1:
> http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/service-and-support/Orange-Pi-RV.html
> 2:
> https://lore.kernel.org/lkml/20251005174450.1949110-1-e@freeshell.de/
> 
> With the card detect describing hardware corrected, and clean up the
> vendor property sort, then please confirm if you think GPIO21 is
> described correctly.

Well yes, GPIO21 should be splitted from PCIe pinctrl and assigned to
be the out-of-band IRQ of the Wi-Fi module. My DT omits this because
the jh7110 pinctrl driver is currently not compatible with brcmfmac
out-of-band IRQ code.

Should I add /delete-node/ for it?

> 
> Acked-by: E Shattow <e@freeshell.de>
> 

Re: [PATCH v2 2/2] riscv: dts: starfive: add DT for Orange Pi RV

[E Shattow]

On 10/6/25 00:39, Icenowy Zheng wrote:
> 在 2025-10-05星期日的 11:47 -0700，E Shattow写道：
>> Hi Icenowy,
>>
>> On 9/30/25 08:51, Icenowy Zheng wrote:
>>> 在 2025-09-30星期二的 18:03 +0800，Icenowy Zheng写道：
>>>> Orange Pi RV is a newly released SBC with JH7110 SoC, single GbE
>>>> port
>>>> (connected to JH7110 GMAC0 via a YT8531 PHY), 4 USB ports (via a
>>>> VL805
>>>> PCIe USB controller connected to JH7110 PCIE0), a M.2 M-key slot
>>>> (connected to JH7110 PCIE1), a HDMI video output, a 3.5mm audio
>>>> output
>>>> and a microSD slot.
>>>>
>>>> Other Onboard peripherals contain a SPI NOR (which contains the
>>>> U-
>>>> Boot
>>>> firmware), a 24c02 EEPROM storing some StarFive-specific
>>>> information
>>>> (factory programmed and read only by default) and an Ampak AP6256
>>>> SDIO
>>>> Wi-Fi module.
>>>>
>>>> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
>>>> ---
>>>> Changes in v2:
>>>> - Property order change mentioned in the review of v1.
>>>> - Added Wi-Fi (along with the always on VCC3V3_PCIE regulator,
>>>> which
>>>> is
>>>>   used to power up WIFI_3V3). The OOB IRQ is still not possible
>>>> to
>>>> use
>>>>   because of some incompatibility between StarFive pinctrl driver
>>>> and
>>>>   brcmfmac.
>>>> - Removed the LED because it's in common DTSI.
>>>>
>>>>  arch/riscv/boot/dts/starfive/Makefile         |  1 +
>>>>  .../boot/dts/starfive/jh7110-orangepi-rv.dts  | 87
>>>> +++++++++++++++++++
>>>>  2 files changed, 88 insertions(+)
>>>>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-orangepi-
>>>> rv.dts
>>>>
>>>> diff --git a/arch/riscv/boot/dts/starfive/Makefile
>>>> b/arch/riscv/boot/dts/starfive/Makefile
>>>> index b3bb12f78e7d5..24f1a44828350 100644
>>>> --- a/arch/riscv/boot/dts/starfive/Makefile
>>>> +++ b/arch/riscv/boot/dts/starfive/Makefile
>>>> @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-
>>>> visionfive-v1.dtb
>>>>  
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-deepcomputing-fml13v01.dtb
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
>>>> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-orangepi-rv.dtb
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
>>>> v1.2a.dtb
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
>>>> v1.3b.dtb
>>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
>>>> b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
>>>> new file mode 100644
>>>> index 0000000000000..5a917b7db6f78
>>>> --- /dev/null
>>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
>>>> @@ -0,0 +1,87 @@
>>>> +// SPDX-License-Identifier: GPL-2.0 OR MIT
>>>> +/*
>>>> + * Copyright (C) 2025 Icenowy Zheng <uwu@icenowy.me>
>>>> + */
>>>> +
>>>> +/dts-v1/;
>>>> +#include "jh7110-common.dtsi"
>>>> +
>>>> +/ {
>>>> +       model = "Xunlong Orange Pi RV";
>>>> +       compatible = "xunlong,orangepi-rv", "starfive,jh7110";
>>>> +
>>>> +       /* This regulator is always on by hardware */
>>>> +       reg_vcc3v3_pcie: regulator-vcc3v3-pcie {
>>>> +               compatible = "regulator-fixed";
>>>> +               regulator-name = "vcc3v3-pcie";
>>>> +               regulator-min-microvolt = <3300000>;
>>>> +               regulator-max-microvolt = <3300000>;
>>>> +               regulator-always-on;
>>>> +       };
>>>> +
>>>> +       wifi_pwrseq: wifi-pwrseq {
>>>> +               compatible = "mmc-pwrseq-simple";
>>>> +               reset-gpios = <&sysgpio 62 GPIO_ACTIVE_LOW>;
>>>> +       };
>>>> +};
>>>> +
>>>> +&gmac0 {
>>>> +       assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
>>>> +       assigned-clock-parents = <&aoncrg
>>>> JH7110_AONCLK_GMAC0_RMII_RTX>;
>>>> +       starfive,tx-use-rgmii-clk;
>>>> +       status = "okay";
>>>> +};
>>>> +
>>>> +&mmc0 {
>>>> +       #address-cells = <1>;
>>>> +       #size-cells = <0>;
>>>> +       cap-sd-highspeed;
>>>> +       mmc-pwrseq = <&wifi_pwrseq>;
>>>> +       vmmc-supply = <&reg_vcc3v3_pcie>;
>>>> +       vqmmc-supply = <&vcc_3v3>;
>>>> +       status = "okay";
>>>> +
>>>> +       ap6256: wifi@1 {
>>>> +               compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-
>>>> fmac";
>>>> +               reg = <1>;
>>>> +               /* TODO: out-of-band IRQ on GPIO21 */
>>>> +       };
>>>> +};
>>>> +
>>
>>>> +&mmc0_pins {
>>>> +       /*
>>>> +        * As the MMC0 bus is used to connect a SDIO Wi-Fi card
>>>> instead of
>>>> +        * an eMMC card, and the eMMC RST is repurposed to be an
>>>> enablement
>>>> +        * pin of the SDIO Wi-Fi, remove it from the pinctrl node
>>>> and
>>>> manage
>>>> +        * it as a GPIO instead.
>>>> +        */
>>>> +       /delete-node/ rst-pins;
>>>> +};
>>>> +
>>
>> Listed on the schematic [1] as:
>> Default function SDIO0 RSTn GPIO62 for eMMC:J9
>> Highlighted (non-default?) function GPIO62 D17 << WIFI_EN_H_GPIO62
>> WIFI_EN_H_GPIO62 >> WIFI_PWREN (pin 12 WL_REG_ON of module AP6256)
>>
>> I've sent a patch [2] to portion out mmc0 reset pins from jh7110-
>> common.dtsi
>>
>>>> +&mmc1 {
>>>> +       /delete-property/ cd-gpios;
>>>> +       broken-cd;
>>>
>>> Well it's found that the card detect is working, although with
>>> different polarity with other boards.
>>>
>>> Here should be:
>>> ```
>>>         cd-gpios = <&sysgpio 41 GPIO_ACTIVE_HIGH>;
>>> ```
>>>
>>> Will be fixed in the next revision.
>>
>> Yes, listed on the schematic [1] as:
>> SD SDIO0 CD GPIO41 for MicroSD:J10
>>
>> There is not a mention of active high or active low on the schematic
>> label, however there is listed a 10Kohm pull-up to +Vdd1.833 for the
>> circuit diagram of the Micro SD Card. The card holder is referenced
>> to
>> ground and could reasonably be N/O or N/C switch operation depending
>> on
>> the exact part selected for manufacture.
>>
>>>
>>>> +};
>>>> +
>>>> +&pcie0 {
>>>> +       status = "okay";
>>>> +};
>>>> +
>>>> +&pcie1 {
>>>> +       status = "okay";
>>>> +};
>>>> +
>>
>>>> +&phy0 {
>>>> +       rx-internal-delay-ps = <1500>;
>>>> +       tx-internal-delay-ps = <1500>;
>>>> +       motorcomm,tx-clk-adj-enabled;
>>>> +       motorcomm,tx-clk-10-inverted;
>>>> +       motorcomm,tx-clk-100-inverted;
>>>> +       motorcomm,tx-clk-1000-inverted;
>>>> +       motorcomm,rx-clk-drv-microamp = <3970>;
>>>> +       motorcomm,rx-data-drv-microamp = <2910>;
>>>> +};
>>
>> 'motorcomm,rx' before 'motorcomm,tx' in `LANG=C sort` of vendor-
>> specific
>> properties.
>>
>>>> +
>>>> +&pwmdac {
>>>> +       status = "okay";
>>>> +};
>>>
>> Additional non-default GPIO as listed in the Orange Pi design:
>> GPIO21 WIFI_WAKE_HOST_H /* default vf2 function PCIE_PWREN_H_GPIO21
>> */
>> GPIO22 >> BT_UART_RXD /* default vf2 function MIPI_PWR_EN */
>> GPIO23 << BT_UART_TXD /* default vf2 function LCD RESET */
>> GPIO24 << BT_UART_CTS /* default vf2 function MIPI_LCD_BL */
>> GPIO25 << BT_UART_RTS /* default vf2 function TP_DET_GPIO25 */
>> GPIO30 << BT_EN_H_GPIO30 /* default vf2 function TP_INT_L */
>> GPIO31 << BT_WAKE_GPIO31 /* default vf2 function TP_RST_L */
>>
>> Of all the above, GPIO21 is defined in jh7110-common.dtsi
>> &pcie1_pins/wake-pins and may need consideration.
>>
>> There is a note about "PMIC_PWRON as Key" and so does this have the
>> meaning of it is used as an input device?
>>
>> Also noted is that the USB over-current circuit appears to be
>> implemented, different than being absent in other VF2 designs.
>>
>> 1:
>> http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/service-and-support/Orange-Pi-RV.html
>> 2:
>> https://lore.kernel.org/lkml/20251005174450.1949110-1-e@freeshell.de/
>>
>> With the card detect describing hardware corrected, and clean up the
>> vendor property sort, then please confirm if you think GPIO21 is
>> described correctly.
> 
> Well yes, GPIO21 should be splitted from PCIe pinctrl and assigned to
> be the out-of-band IRQ of the Wi-Fi module. My DT omits this because
> the jh7110 pinctrl driver is currently not compatible with brcmfmac
> out-of-band IRQ code.
> 
> Should I add /delete-node/ for it?
> 
>>
>> Acked-by: E Shattow <e@freeshell.de>
>>
> 

No, it is not needed to /delete-node/. Add some note to the commit
message that the WiFi/Bt functionality is not complete for this series
because of out-of-band IRQ requirement.

GPIO21 is also changed in dts for DeepComputing Framework Laptop 13 V01
and so it will make sense to split GPIO21 out from jh7110-common.dtsi in
a separate patch. We can return after then to the topic of the AP6256 on
Orange Pi RV and Milk-V Mars CM.

Thank you very much,

-E

Re: [PATCH v2 2/2] riscv: dts: starfive: add DT for Orange Pi RV

[E Shattow]

On 10/6/25 00:39, Icenowy Zheng wrote:
> 在 2025-10-05星期日的 11:47 -0700，E Shattow写道：
>> Hi Icenowy,
>>
>> On 9/30/25 08:51, Icenowy Zheng wrote:
>>> 在 2025-09-30星期二的 18:03 +0800，Icenowy Zheng写道：
>>>> Orange Pi RV is a newly released SBC with JH7110 SoC, single GbE
>>>> port
>>>> (connected to JH7110 GMAC0 via a YT8531 PHY), 4 USB ports (via a
>>>> VL805
>>>> PCIe USB controller connected to JH7110 PCIE0), a M.2 M-key slot
>>>> (connected to JH7110 PCIE1), a HDMI video output, a 3.5mm audio
>>>> output
>>>> and a microSD slot.
>>>>
>>>> Other Onboard peripherals contain a SPI NOR (which contains the
>>>> U-
>>>> Boot
>>>> firmware), a 24c02 EEPROM storing some StarFive-specific
>>>> information
>>>> (factory programmed and read only by default) and an Ampak AP6256
>>>> SDIO
>>>> Wi-Fi module.
>>>>
>>>> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
>>>> ---
>>>> Changes in v2:
>>>> - Property order change mentioned in the review of v1.
>>>> - Added Wi-Fi (along with the always on VCC3V3_PCIE regulator,
>>>> which
>>>> is
>>>>   used to power up WIFI_3V3). The OOB IRQ is still not possible
>>>> to
>>>> use
>>>>   because of some incompatibility between StarFive pinctrl driver
>>>> and
>>>>   brcmfmac.
>>>> - Removed the LED because it's in common DTSI.
>>>>
>>>>  arch/riscv/boot/dts/starfive/Makefile         |  1 +
>>>>  .../boot/dts/starfive/jh7110-orangepi-rv.dts  | 87
>>>> +++++++++++++++++++
>>>>  2 files changed, 88 insertions(+)
>>>>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-orangepi-
>>>> rv.dts
>>>>
>>>> diff --git a/arch/riscv/boot/dts/starfive/Makefile
>>>> b/arch/riscv/boot/dts/starfive/Makefile
>>>> index b3bb12f78e7d5..24f1a44828350 100644
>>>> --- a/arch/riscv/boot/dts/starfive/Makefile
>>>> +++ b/arch/riscv/boot/dts/starfive/Makefile
>>>> @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-
>>>> visionfive-v1.dtb
>>>>  
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-deepcomputing-fml13v01.dtb
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
>>>> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-orangepi-rv.dtb
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
>>>> v1.2a.dtb
>>>>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-
>>>> v1.3b.dtb
>>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
>>>> b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
>>>> new file mode 100644
>>>> index 0000000000000..5a917b7db6f78
>>>> --- /dev/null
>>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts
>>>> @@ -0,0 +1,87 @@
>>>> +// SPDX-License-Identifier: GPL-2.0 OR MIT
>>>> +/*
>>>> + * Copyright (C) 2025 Icenowy Zheng <uwu@icenowy.me>
>>>> + */
>>>> +
>>>> +/dts-v1/;
>>>> +#include "jh7110-common.dtsi"
>>>> +
>>>> +/ {
>>>> +       model = "Xunlong Orange Pi RV";
>>>> +       compatible = "xunlong,orangepi-rv", "starfive,jh7110";
>>>> +
>>>> +       /* This regulator is always on by hardware */
>>>> +       reg_vcc3v3_pcie: regulator-vcc3v3-pcie {
>>>> +               compatible = "regulator-fixed";
>>>> +               regulator-name = "vcc3v3-pcie";
>>>> +               regulator-min-microvolt = <3300000>;
>>>> +               regulator-max-microvolt = <3300000>;
>>>> +               regulator-always-on;
>>>> +       };
>>>> +
>>>> +       wifi_pwrseq: wifi-pwrseq {
>>>> +               compatible = "mmc-pwrseq-simple";
>>>> +               reset-gpios = <&sysgpio 62 GPIO_ACTIVE_LOW>;
>>>> +       };
>>>> +};
>>>> +
>>>> +&gmac0 {
>>>> +       assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
>>>> +       assigned-clock-parents = <&aoncrg
>>>> JH7110_AONCLK_GMAC0_RMII_RTX>;
>>>> +       starfive,tx-use-rgmii-clk;
>>>> +       status = "okay";
>>>> +};
>>>> +
>>>> +&mmc0 {
>>>> +       #address-cells = <1>;
>>>> +       #size-cells = <0>;
>>>> +       cap-sd-highspeed;
>>>> +       mmc-pwrseq = <&wifi_pwrseq>;
>>>> +       vmmc-supply = <&reg_vcc3v3_pcie>;
>>>> +       vqmmc-supply = <&vcc_3v3>;
>>>> +       status = "okay";
>>>> +
>>>> +       ap6256: wifi@1 {
>>>> +               compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-
>>>> fmac";
>>>> +               reg = <1>;
>>>> +               /* TODO: out-of-band IRQ on GPIO21 */
>>>> +       };
>>>> +};
>>>> +
>>
>>>> +&mmc0_pins {
>>>> +       /*
>>>> +        * As the MMC0 bus is used to connect a SDIO Wi-Fi card
>>>> instead of
>>>> +        * an eMMC card, and the eMMC RST is repurposed to be an
>>>> enablement
>>>> +        * pin of the SDIO Wi-Fi, remove it from the pinctrl node
>>>> and
>>>> manage
>>>> +        * it as a GPIO instead.
>>>> +        */
>>>> +       /delete-node/ rst-pins;
>>>> +};
>>>> +
>>
>> Listed on the schematic [1] as:
>> Default function SDIO0 RSTn GPIO62 for eMMC:J9
>> Highlighted (non-default?) function GPIO62 D17 << WIFI_EN_H_GPIO62
>> WIFI_EN_H_GPIO62 >> WIFI_PWREN (pin 12 WL_REG_ON of module AP6256)
>>
>> I've sent a patch [2] to portion out mmc0 reset pins from jh7110-
>> common.dtsi
>>
>>>> +&mmc1 {
>>>> +       /delete-property/ cd-gpios;
>>>> +       broken-cd;
>>>
>>> Well it's found that the card detect is working, although with
>>> different polarity with other boards.
>>>
>>> Here should be:
>>> ```
>>>         cd-gpios = <&sysgpio 41 GPIO_ACTIVE_HIGH>;
>>> ```
>>>
>>> Will be fixed in the next revision.
>>
>> Yes, listed on the schematic [1] as:
>> SD SDIO0 CD GPIO41 for MicroSD:J10
>>
>> There is not a mention of active high or active low on the schematic
>> label, however there is listed a 10Kohm pull-up to +Vdd1.833 for the
>> circuit diagram of the Micro SD Card. The card holder is referenced
>> to
>> ground and could reasonably be N/O or N/C switch operation depending
>> on
>> the exact part selected for manufacture.
>>
>>>
>>>> +};
>>>> +
>>>> +&pcie0 {
>>>> +       status = "okay";
>>>> +};
>>>> +
>>>> +&pcie1 {
>>>> +       status = "okay";
>>>> +};
>>>> +
>>
>>>> +&phy0 {
>>>> +       rx-internal-delay-ps = <1500>;
>>>> +       tx-internal-delay-ps = <1500>;
>>>> +       motorcomm,tx-clk-adj-enabled;
>>>> +       motorcomm,tx-clk-10-inverted;
>>>> +       motorcomm,tx-clk-100-inverted;
>>>> +       motorcomm,tx-clk-1000-inverted;
>>>> +       motorcomm,rx-clk-drv-microamp = <3970>;
>>>> +       motorcomm,rx-data-drv-microamp = <2910>;
>>>> +};
>>
>> 'motorcomm,rx' before 'motorcomm,tx' in `LANG=C sort` of vendor-
>> specific
>> properties.
>>
>>>> +
>>>> +&pwmdac {
>>>> +       status = "okay";
>>>> +};
>>>
>> Additional non-default GPIO as listed in the Orange Pi design:
>> GPIO21 WIFI_WAKE_HOST_H /* default vf2 function PCIE_PWREN_H_GPIO21
>> */
>> GPIO22 >> BT_UART_RXD /* default vf2 function MIPI_PWR_EN */
>> GPIO23 << BT_UART_TXD /* default vf2 function LCD RESET */
>> GPIO24 << BT_UART_CTS /* default vf2 function MIPI_LCD_BL */
>> GPIO25 << BT_UART_RTS /* default vf2 function TP_DET_GPIO25 */
>> GPIO30 << BT_EN_H_GPIO30 /* default vf2 function TP_INT_L */
>> GPIO31 << BT_WAKE_GPIO31 /* default vf2 function TP_RST_L */
>>
>> Of all the above, GPIO21 is defined in jh7110-common.dtsi
>> &pcie1_pins/wake-pins and may need consideration.
>>
>> There is a note about "PMIC_PWRON as Key" and so does this have the
>> meaning of it is used as an input device?
>>
>> Also noted is that the USB over-current circuit appears to be
>> implemented, different than being absent in other VF2 designs.
>>
>> 1:
>> http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/service-and-support/Orange-Pi-RV.html
>> 2:
>> https://lore.kernel.org/lkml/20251005174450.1949110-1-e@freeshell.de/
>>
>> With the card detect describing hardware corrected, and clean up the
>> vendor property sort, then please confirm if you think GPIO21 is
>> described correctly.
> 
> Well yes, GPIO21 should be splitted from PCIe pinctrl and assigned to
> be the out-of-band IRQ of the Wi-Fi module. My DT omits this because
> the jh7110 pinctrl driver is currently not compatible with brcmfmac
> out-of-band IRQ code.
> 
> Should I add /delete-node/ for it?
> 

No, and thank you for the confirmation. This special change for GPIO21
can be something for future fix/enhancement. The "dts: starfive:
jh7110-common: split out mmc0 reset pins from common into boards" patch
has landed in riscv-dt-for-next so it is good now to address the other
review comments and send v3.

>>
>> Acked-by: E Shattow <e@freeshell.de>
>>
> 

-E

Re: [PATCH v2 1/2] dt-bindings: riscv: starfive: add Orange Pi RV board compatible

[Emil Renner Berthing]

Quoting Icenowy Zheng (2025-09-30 12:03:17)
> Orange Pi RV is a newly released JH7110 board by Xunlong.
>
> Add a compatible string to the starfive platform DT binding.
>
> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>

Hi Icenowy,

Thanks for the patches! Now that E's patch is in Conor's
riscv-dt-for-next branch
will you be sending a v3? Also please add a cover letter when you do.

/Emil

Re: [PATCH v2 1/2] dt-bindings: riscv: starfive: add Orange Pi RV board compatible

[Icenowy Zheng]

在 2025-11-13星期四的 02:55 -0800，Emil Renner Berthing写道：
> Quoting Icenowy Zheng (2025-09-30 12:03:17)
> > Orange Pi RV is a newly released JH7110 board by Xunlong.
> > 
> > Add a compatible string to the starfive platform DT binding.
> > 
> > Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> 
> Hi Icenowy,
> 
> Thanks for the patches! Now that E's patch is in Conor's
> riscv-dt-for-next branch
> will you be sending a v3? Also please add a cover letter when you do.

I will do this when I have time.

BTW, your this mail gets DMARC quarantined by my mail provider.

Thanks,
Icenowy

> 
> /Emil