From: Neil Armstrong <neil.armstrong@linaro.org>
To: Marc Zyngier <maz@kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Hanjun Guo" <guohanjun@huawei.com>,
"Sudeep Holla" <sudeep.holla@kernel.org>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Daniel Lezcano" <daniel.lezcano@kernel.org>,
"Thomas Gleixner" <tglx@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@kernel.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Kevin Hilman" <khilman@baylibre.com>,
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"Martin Blumenstingl" <martin.blumenstingl@googlemail.com>,
"Ge Gordon" <gordon.ge@bst.ai>,
"BST Linux Kernel Upstream Group" <bst-upstream@bstai.top>,
"Jesper Nilsson" <jesper.nilsson@axis.com>,
"Lars Persson" <lars.persson@axis.com>,
"Alim Akhtar" <alim.akhtar@samsung.com>,
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"Frank Li" <Frank.Li@nxp.com>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"Dinh Nguyen" <dinguyen@kernel.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
"Thierry Reding" <thierry.reding@kernel.org>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konradybcio@kernel.org>,
"Andreas Färber" <afaerber@suse.de>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Orson Zhai" <orsonzhai@gmail.com>,
"Baolin Wang" <baolin.wang@linux.alibaba.com>,
"Michal Simek" <michal.simek@amd.com>
Subject: Re: [PATCH 05/16] arm64: dts: amlogic: Add EL2 virtual timer interrupt
Date: Thu, 7 May 2026 17:44:10 +0200 [thread overview]
Message-ID: <b8dca238-e791-4185-8a0b-cf7a44b9f5f6@linaro.org> (raw)
In-Reply-To: <20260507125544.2903406-6-maz@kernel.org>
On 5/7/26 14:55, Marc Zyngier wrote:
> The ARMv8.2 based CPUs used in a number of Amlogic SoCs are missing
> the EL2 virtual timer interrupt. Add it.
>
> This requires some surgery in the "common" files to move the timer
> node to locations that makes it possible to add the interrupt only
> where it is actually implemented.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi | 8 --------
> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 8 ++++++++
> arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 9 +++++++++
> arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 3 ++-
> arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 3 ++-
> arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi | 3 ++-
> arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 13 -------------
> arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 9 +++++++++
> arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 10 ++++++++++
> 9 files changed, 42 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi
> index 54d7a2d56ef64..6f559e4dd9ee9 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi
> @@ -7,14 +7,6 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/gpio/gpio.h>
> / {
> - timer {
> - compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> - };
> -
> psci {
> compatible = "arm,psci-1.0";
> method = "smc";
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> index fce45933fa28b..c28fc7fcbae7f 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> @@ -86,6 +86,14 @@ pwrc: power-controller {
> #power-domain-cells = <1>;
> };
> };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> };
>
> &apb {
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
> index 2b12d8284594f..c22c0acb4807e 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
> @@ -49,6 +49,15 @@ pwrc: power-controller {
> #power-domain-cells = <1>;
> };
> };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> };
>
> &apb {
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
> index ab3acef2b147e..853d32929ff46 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
> @@ -56,7 +56,8 @@ timer {
> interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> - <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
> };
>
> psci {
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
> index a3faf4d188e11..bfaac5f3e22da 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
> @@ -94,7 +94,8 @@ timer {
> interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> psci {
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi
> index 0c4417bcd6827..32d8683059964 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi
> @@ -58,7 +58,8 @@ timer {
> interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> psci {
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> index 00609d2da6743..a911a5181a88d 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> @@ -2579,19 +2579,6 @@ map {
> };
> };
>
> - timer {
> - compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13
> - (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14
> - (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11
> - (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10
> - (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
> - arm,no-tick-in-suspend;
> - };
> -
> xtal: xtal-clk {
> compatible = "fixed-clock";
> clock-frequency = <24000000>;
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
> index 664912d1beaab..866fc07d1b0ae 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
> @@ -43,6 +43,15 @@ tdmif_c: audio-controller-2 {
> clock-names = "sclk", "lrclk", "mclk";
> status = "disabled";
> };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
> + arm,no-tick-in-suspend;
> + };
> };
>
> &apb {
> diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> index 8f5b850b1774f..77c72936ffdd3 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
> @@ -128,6 +128,16 @@ l2: l2-cache0 {
> };
> };
>
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 12 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
> + arm,no-tick-in-suspend;
> + };
> +
> cpu_opp_table: opp-table {
> compatible = "operating-points-v2";
> opp-shared;
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Thanks,
Neil
next prev parent reply other threads:[~2026-05-07 15:44 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-07 12:55 [PATCH 00/16] arm64: Use EL2 virtual timer when running VHE Marc Zyngier
2026-05-07 12:55 ` [PATCH 01/16] ACPI: GTDT: Parse information related to the EL2 virtual timer Marc Zyngier
2026-05-07 12:55 ` [PATCH 02/16] clocksource/drivers/arm_arch_timer: Default to EL2 virtual timer when running VHE Marc Zyngier
2026-05-08 14:15 ` Marc Zyngier
2026-05-07 12:55 ` [PATCH 03/16] dt-bindings: timer: arm,arch_timer: Fix requirements for interrupt description Marc Zyngier
2026-05-07 12:55 ` [PATCH 04/16] arm64: dts: allwinner: Add EL2 virtual timer interrupt Marc Zyngier
2026-05-07 12:55 ` [PATCH 05/16] arm64: dts: amlogic: " Marc Zyngier
2026-05-07 15:44 ` Neil Armstrong [this message]
2026-05-07 12:55 ` [PATCH 06/16] arm64: dts: bst: " Marc Zyngier
2026-05-07 12:55 ` [PATCH 07/16] arm64: dts: exynos: " Marc Zyngier
2026-05-07 12:55 ` [PATCH 08/16] arm64: dts: freescale: " Marc Zyngier
2026-05-07 12:55 ` [PATCH 09/16] arm64: dts: intel: " Marc Zyngier
2026-05-07 12:55 ` [PATCH 10/16] arm64: dts: mediatek: " Marc Zyngier
2026-05-07 12:55 ` [PATCH 11/16] arm64: dts: nvidia: " Marc Zyngier
2026-05-07 12:55 ` [PATCH 12/16] arm64: dts: qcom: " Marc Zyngier
2026-05-07 12:55 ` [PATCH 13/16] arm64: dts: realtek: " Marc Zyngier
2026-05-07 12:55 ` [PATCH 14/16] arm64: dts: rockchip: " Marc Zyngier
2026-05-07 15:33 ` Heiko Stuebner
2026-05-07 15:57 ` Marc Zyngier
2026-05-07 12:55 ` [PATCH 15/16] arm64: dts: sprd: " Marc Zyngier
2026-05-07 12:55 ` [PATCH 16/16] arm64: dts: xilinx: " Marc Zyngier
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