Re: [PATCH v5 5/6] clk: qcom: camcc-x1p42100: Add support for camera clock controller

[Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>]

On 5/7/2026 1:45 PM, Bryan O'Donoghue wrote:
> On 07/05/2026 06:38, Jagadeesh Kona wrote:
>> +static const struct alpha_pll_config cam_cc_pll1_config = {
>> +    .l = 0x25,
>> +    .alpha = 0xeaaa,
>> +    .config_ctl_val = 0x20485699,
>> +    .config_ctl_hi_val = 0x00182261,
>> +    .config_ctl_hi1_val = 0x82aa299c,
>> +    .test_ctl_val = 0x00000000,
>> +    .test_ctl_hi_val = 0x00000003,
>> +    .test_ctl_hi1_val = 0x00009000,
>> +    .test_ctl_hi2_val = 0x00000034,
>> +    .user_ctl_val = 0x00000400,
>> +    .user_ctl_hi_val = 0x00000005,
>> +};
> 
> Since its a script that generates most of this code, can't you teach it to enumerate these magic numbers with defines and bit-fields ?
> 
> I'm not sure if I got an answer to that question on the last iteration of this patch but, asking again now.
> 

As Konrad mentioned in the earlier thread [1], most of the values above are static configuration parameters recommended
by the PLL hardware team to ensure correct PLL operation. These values are programmed as is during initialization and
are not modified or referenced by software later. Since these settings/fields are unused later in SW, they are defined
as static values.

For the limited set of PLL registers that software interacts with, the relevant bit definitions are already defined
in clk-alpha-pll.c. 

[1]: https://lore.kernel.org/all/009ecdbb-2297-44eb-862d-233e3290691c@oss.qualcomm.com/#t 

Thanks,
Jagadeesh