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AJvYcCV3zBIL9mLEwaQ7d5w3FXhR/YkzZj3qIeWXuOq+TJ2HcIxsyKBevNzQI+1KxSCGR6Mo89p6kJB5u0S/@vger.kernel.org X-Gm-Message-State: AOJu0YzLHuTUblDYT5wnpfHKD4sxedreVCda3hQ9FuoD8bhVwXbXADic mQnStINeurv5DtLhuCveKsQxU/Bcn3fB/5RyANOIM5hD6YM/3YYnkE/vCDNCZQU= X-Google-Smtp-Source: AGHT+IEHTQ5wOu9NxUvBgVG3q+Vz5Q9uWU1Gz79aPOENRB/2Xj3YqbpYXp26n28FGcPh+P9z83I7JA== X-Received: by 2002:a17:906:f591:b0:a9a:13dd:2734 with SMTP id a640c23a62f3a-a9de5f2641fmr1504885266b.36.1730275949334; Wed, 30 Oct 2024 01:12:29 -0700 (PDT) Received: from [192.168.0.157] ([79.115.63.43]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-431bd8e8549sm13364615e9.10.2024.10.30.01.12.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 01:12:28 -0700 (PDT) Message-ID: Date: Wed, 30 Oct 2024 08:12:26 +0000 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 02/11] scsi: ufs: exynos: add check inside exynos_ufs_config_smu() To: Peter Griffin , alim.akhtar@samsung.com, James.Bottomley@HansenPartnership.com, martin.petersen@oracle.com, avri.altman@wdc.com, bvanassche@acm.org, krzk@kernel.org Cc: andre.draszik@linaro.org, kernel-team@android.com, willmcvicker@google.com, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, ebiggers@kernel.org References: <20241025131442.112862-1-peter.griffin@linaro.org> <20241025131442.112862-3-peter.griffin@linaro.org> Content-Language: en-US From: Tudor Ambarus In-Reply-To: <20241025131442.112862-3-peter.griffin@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/25/24 2:14 PM, Peter Griffin wrote: > Move the EXYNOS_UFS_OPT_UFSPR_SECURE check inside exynos_ufs_config_smu(). > > This way all call sites will benefit from the check. This fixes a bug > currently in the exynos_ufs_resume() path on gs101 which will cause > a serror. because resume() calls exynos_ufs_config_smu() and we ended up accessing register fields that we shouldn't have. > > Fixes: d11e0a318df8 ("scsi: ufs: exynos: Add support for Tensor gs101 SoC") Cc: stable@vger.kernel.org Reviewed-by: Tudor Ambarus > Signed-off-by: Peter Griffin > --- > drivers/ufs/host/ufs-exynos.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c > index e25de4b86ac0..939d08bce545 100644 > --- a/drivers/ufs/host/ufs-exynos.c > +++ b/drivers/ufs/host/ufs-exynos.c > @@ -724,6 +724,9 @@ static void exynos_ufs_config_smu(struct exynos_ufs *ufs) > { > u32 reg, val; > > + if (ufs->opts & EXYNOS_UFS_OPT_UFSPR_SECURE) > + return; > + > exynos_ufs_disable_auto_ctrl_hcc_save(ufs, &val); > > /* make encryption disabled by default */ > @@ -1457,8 +1460,8 @@ static int exynos_ufs_init(struct ufs_hba *hba) > if (ret) > goto out; > exynos_ufs_specify_phy_time_attr(ufs); > - if (!(ufs->opts & EXYNOS_UFS_OPT_UFSPR_SECURE)) > - exynos_ufs_config_smu(ufs); > + > + exynos_ufs_config_smu(ufs); > > hba->host->dma_alignment = DATA_UNIT_SIZE - 1; > return 0;