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([2a00:f41:906b:9c4e:a878:12c9:4d61:a6f2]) by smtp.gmail.com with ESMTPSA id c19-20020a197613000000b005033948f108sm3895415lff.272.2023.09.30.09.39.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 30 Sep 2023 09:39:37 -0700 (PDT) Message-ID: Date: Sat, 30 Sep 2023 18:39:33 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v2 4/5] clk: qcom: camcc-sc8280xp: Add sc8280xp CAMCC To: Bryan O'Donoghue , andersson@kernel.org, agross@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, jonathan@marek.ca, quic_tdas@quicinc.com, vladimir.zapolskiy@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230930134114.1816590-1-bryan.odonoghue@linaro.org> <20230930134114.1816590-5-bryan.odonoghue@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20230930134114.1816590-5-bryan.odonoghue@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net On 9/30/23 15:41, Bryan O'Donoghue wrote: > Add the sc8280xp CAMCC driver which follows the sdm845 CAMCC lineage > with additional CCI and IFE blocks and more granular clock parentage. > > Signed-off-by: Bryan O'Donoghue > --- [...] > +static struct clk_branch camcc_gdsc_clk = { > + .halt_reg = 0xc1e4, > + .halt_check = BRANCH_HALT, > + .clkr = { > + .enable_reg = 0xc1e4, > + .enable_mask = BIT(0), > + .hw.init = &(struct clk_init_data){ > + .name = "camcc_gdsc_clk", > + .parent_hws = (const struct clk_hw*[]){ > + &camcc_xo_clk_src.clkr.hw, > + }, > + .num_parents = 1, > + .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, "meh" Is this clock only necessary for the GDSC to turn on? I wanted to say "just chuck it into gdsc.cxcs", but upon actually reading the code, I realized that just doing so doesn't event turn the referenced clocks on.. That's.. a realization.. I think I'll be able to solve a couple bugs with this knowledge.. [...] > + ret = qcom_cc_really_probe(pdev, &camcc_sc8280xp_desc, regmap); This conflicts with [1] > + if (ret) > + goto err_put_rpm; [...] > + > +static int __init camcc_sc8280xp_init(void) > +{ > + return platform_driver_register(&camcc_sc8280xp_driver); > +} > +subsys_initcall(camcc_sc8280xp_init); module_platform_driver, please Konrad [1] https://lore.kernel.org/linux-arm-msm/20230923112105.18102-4-quic_luoj@quicinc.com/