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([2001:a61:3456:4e01:6ae:b55a:bd1d:57fc]) by smtp.gmail.com with ESMTPSA id g14-20020a05600c310e00b0040b481222e3sm11828195wmo.41.2023.12.02.01.42.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Dec 2023 01:42:11 -0800 (PST) Message-ID: Subject: Re: [PATCH v2 2/2] hwmon: ltc4282: add support for the LTC4282 chip From: Nuno =?ISO-8859-1?Q?S=E1?= To: Guenter Roeck , Andy Shevchenko Cc: Linus Walleij , nuno.sa@analog.com, linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, Jean Delvare , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Corbet , Bartosz Golaszewski Date: Sat, 02 Dec 2023 10:42:10 +0100 In-Reply-To: <66454ca2-d5cb-4701-a237-03b3991a791f@roeck-us.net> References: <6384831c05b8ceeaf4a16cf9229770252989b762.camel@gmail.com> <971eb35068639ec404669ea5320c8183ea71a7d0.camel@gmail.com> <61a8f54835c10db7a9c650ee2e3706b47382c634.camel@gmail.com> <7dc3f137-6073-4262-afb5-439d024bbbd2@roeck-us.net> <986fb7dc2a34602fa9c2d57a7a3e06a71cfdc0a0.camel@gmail.com> <66454ca2-d5cb-4701-a237-03b3991a791f@roeck-us.net> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.48.4 (3.48.4-1.fc38) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2023-12-01 at 08:46 -0800, Guenter Roeck wrote: > On 12/1/23 08:29, Nuno S=C3=A1 wrote: > > On Fri, 2023-12-01 at 08:04 -0800, Guenter Roeck wrote: > > > On 12/1/23 07:47, Andy Shevchenko wrote: > > > > On Fri, Dec 01, 2023 at 04:24:35PM +0100, Nuno S=C3=A1 wrote: > > > > > On Fri, 2023-12-01 at 14:40 +0100, Linus Walleij wrote: > > > >=20 > > > > ... > > > >=20 > > > > > Yes, that is the only thing we have. Meaning that there is no hw = setting to > > > > > set > > > > > the > > > > > pins to open drain. Open drain is what they are. That is why I'm = not seeing > > > > > the > > > > > point > > > > > in having PIN_CONFIG_DRIVE_OPEN_DRAIN implemented. > > > >=20 > > > > At least you have to implement error for PUSH_PULL mode and other m= odes, > > > > so from the (core) software point of view the user should be able t= o ask for > > > > anything and get an answer from the certain driver that "hey, i do = support > > > > OD", > > > > or "hey, push-pull can't be supported with this hw". > > > >=20 > > >=20 > > > It seems to me that this is heading towards a mfd driver. I don't fee= l > > > comfortable > > > with all that gpio specific code in the hwmon subsystem. > > >=20 > > > Maybe I should request that all hwmon chips with gpio support must be > > > implemented > > > as mfd drivers. I'll have to think about that. > > >=20 > > > Guenter > > >=20 > >=20 > > Hopefully you don't ask that already for this driver... > >=20 >=20 > Yes, I am, because the gpio part is getting way to complicated for embedd= ing it > into a hwmon driver. >=20 Well, fair enough... I will then drop it for now. The priority is the hwmon= part as that was the request from a customer. I'll only leave the pin functions tha= t might be relevant from a monitoring point of view. Hopefully, I'll get into the gpio stuff later on. From a brief look, the au= xiliary bus might feet and easier than mfd. - Nuno S=C3=A1