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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6507b9d51basm7484207a12.12.2026.01.08.04.43.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 08 Jan 2026 04:43:33 -0800 (PST) Message-ID: Date: Thu, 8 Jan 2026 13:43:30 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] arm64: dts: qcom: agatti: Address Gunyah memory alignment needs To: Sumit Garg Cc: Bjorn Andersson , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, akhilpo@oss.qualcomm.com, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, robin.clark@oss.qualcomm.com, lumag@kernel.org, linux-kernel@vger.kernel.org, Sumit Garg References: <20251229071258.456254-1-sumit.garg@kernel.org> <20251229071258.456254-2-sumit.garg@kernel.org> <73bcf4c8-3d49-4b55-a771-0c5c1ef54380@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 6mdc5Shl-LmPKBe7LXujnN4-wNBl8jFg X-Authority-Analysis: v=2.4 cv=X7Jf6WTe c=1 sm=1 tr=0 ts=695fa677 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=8cjB7eQHtUe5wF3l764A:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA4MDA4OSBTYWx0ZWRfX0jRIHA1Y2Gfx ZDOc7uSDYRDsvHei20q19mspZYLXj6Jo9Jd8tEonByyGzvS+WXTZW57V10ynXwgcE3R6eXXLERI JC9a/MuAORP/nI6nccshzvbQnrEwNy3KTCwCVd/qYeOSBWhNbVbBeZi/pnuDgdQEf/VZEELCR6T zba0TaYndt6iutNLk8MrWeVnDRrPfwreXzKWdSrOctUQjYyIbeoxZY0hf8pShZVPcLD1AvHnGq4 a7DbbjwS/IkiFP59xzkfRvuZ49FSsKa0G8rlC5DW/snhkcAGVrclCfhMIXcLoMc3K/Uxebeg9cc U3HO4ed7vQt8USCirodV++qQyDLBRJ/89wVJr/VAuFsmq2RsJcOJZibMr3XwNsnMUks4ZmJn+ft ZzJuMK9X+CdMsSXPz3geTNtRr9SKVCvAdHeAcbJ1VIsxbYzyI47q/ay2U8iWxeRhVBvFjmKfL8n BtI0BEZtp52lP0nd4rw== X-Proofpoint-ORIG-GUID: 6mdc5Shl-LmPKBe7LXujnN4-wNBl8jFg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-08_02,2026-01-07_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 bulkscore=0 suspectscore=0 phishscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601080089 On 1/8/26 11:50 AM, Sumit Garg wrote: > On Wed, Jan 07, 2026 at 12:29:02PM +0100, Konrad Dybcio wrote: >> On 1/5/26 6:46 AM, Sumit Garg wrote: >>> On Sat, Jan 03, 2026 at 09:49:04AM -0600, Bjorn Andersson wrote: >>>> On Mon, Dec 29, 2025 at 12:42:58PM +0530, Sumit Garg wrote: >>>>> From: Sumit Garg >>>>> >>>>> Gunyah hypervisor requires it's memory start address to be 2MB aligned. >>>>> So the address map for Agatti is updated to incorporate that requirement. >>>>> This should be a backwards compatible DT change which should work with >>>>> legacy QHEE based firmware stack too. >>>>> >>>> >>>> How come this isn't conveyed to the operating system using the UEFI >>>> memory map? >>>> >>> >>> I agree that with EFI boot, the information is getting conveyed via EFI >>> memory map. But there will be non-EFI boot scenarios as well in case of >>> U-Boot. And moreover I suppose we need to keep the reserved memory >>> ranges in DT updated to reflect the actual memory map. >> >> Can U-Boot not do the same by altering /reserved-memory or /memory/reg? > > I suppose you are referring to DT fixups here, we generally try to keep > them to a minimum required in U-Boot. > > BTW, don't we want to keep reserved memory ranges updated in DT? Or we plan > to drop them altogether? Generally I believe they're only a necessary evil.. Since Gunyah-on-Agatti doesn't seem to have been released yet, it would seem like a sane idea to fix the issue in the firmware. If it was, well.. On UEFI-enabled targets, we can largely rely on the reservations coming from there, only adding some carveouts for e.g. PIL regions and SMEM (not because they're not resereved, but because we need a pointer to them) Konrad