From: Srivathsa L Rao <srivathsa.rao@oss.qualcomm.com>
To: Yin Li <yin.li@oss.qualcomm.com>,
James Morse <james.morse@arm.com>, Rob Herring <robh@kernel.org>,
Shanker Donthineni <sdonthineni@nvidia.com>,
Ben Horgan <ben.horgan@arm.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Danilo Krummrich <dakr@kernel.org>,
Reinette Chatre <reinette.chatre@intel.com>,
Fenghua Yu <fenghuay@nvidia.com>,
Jonathan Cameron <jic23@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Gavin Shan <gshan@redhat.com>
Cc: "Andre Przywara" <andre.przywara@arm.com>,
"Drew Fustini" <fustini@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Shaopeng Tan" <tan.shaopeng@jp.fujitsu.com>,
trilok.soni@oss.qualcomm.com, aiqun.yu@oss.qualcomm.com,
ganapatrao.kulkarni@oss.qualcomm.com,
"Huang Yiwei" <huang.yiwei@oss.qualcomm.com>,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
driver-core@lists.linux.dev, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 1/6] arm_mpam: Fix the RIS index range check in mpam_ris_create_locked
Date: Fri, 30 Oct 2026 22:45:31 +0530 [thread overview]
Message-ID: <ba4afee7-5c3b-43fe-9703-9cd42e0fadca@oss.qualcomm.com> (raw)
In-Reply-To: <20261028-mpam-resctrl-dt-knp-support-v4-1-bdda1e445cba@oss.qualcomm.com>
Hi Yin,
Reviewed by: Srivathsa L Rao <srivathsa.rao@oss.qualcomm.com>
On 10/28/2026 5:15 PM, Yin Li wrote:
> The RIS selector field is defined as MPAMCFG_PART_SEL_RIS (bits 27:24),
> which is 4 bits wide and gives valid indices 0..15. MPAM_MSC_MAX_NUM_RIS
> is defined as 16, so the check should use >= to reject index 16 and
> above. The previous > check incorrectly accepted index 16 as valid.
>
> Fixes: 01fb4b822472 ("arm_mpam: Add the class and component structures for firmware described ris")
> Signed-off-by: Yin Li <yin.li@oss.qualcomm.com>
> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-by: Ben Horgan <ben.horgan@arm.com>
> ---
> drivers/resctrl/mpam_devices.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
> index 48adc49b833c..347a5a6d6a1d 100644
> --- a/drivers/resctrl/mpam_devices.c
> +++ b/drivers/resctrl/mpam_devices.c
> @@ -700,7 +700,7 @@ static int mpam_ris_create_locked(struct mpam_msc *msc, u8 ris_idx,
>
> lockdep_assert_held(&mpam_list_lock);
>
> - if (ris_idx > MPAM_MSC_MAX_NUM_RIS)
> + if (ris_idx >= MPAM_MSC_MAX_NUM_RIS)
> return -EINVAL;
>
> if (test_and_set_bit(ris_idx, &msc->ris_idxs))
>
Best Regards,
Srivathsa
next prev parent reply other threads:[~2026-10-30 17:15 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-28 11:45 [PATCH v4 0/6] arm-mpam: Add basic device tree support for resctrl Yin Li
2026-10-28 11:45 ` [PATCH v4 1/6] arm_mpam: Fix the RIS index range check in mpam_ris_create_locked Yin Li
2026-10-30 17:15 ` Srivathsa L Rao [this message]
2026-10-28 11:45 ` [PATCH v4 2/6] arm_mpam: Fix MSC MMIO window size off-by-one with resource_size() Yin Li
2026-10-29 8:13 ` Jinjie Ruan
2026-10-29 12:02 ` Ilpo Järvinen
2026-10-30 17:18 ` Srivathsa L Rao
2026-10-28 11:45 ` [PATCH v4 3/6] dt-bindings: arm: Add MPAM MSC binding Yin Li
2026-10-28 11:56 ` sashiko-bot
2026-10-28 11:45 ` [PATCH v4 4/6] cacheinfo: Expose the code to generate a cache-id from a device_node Yin Li
2026-10-28 11:45 ` [PATCH v4 5/6] arm_mpam: Add device tree support for MSC probing Yin Li
2026-10-28 12:04 ` sashiko-bot
2026-10-28 11:45 ` [PATCH DNM v4 6/6] arm64: dts: qcom: kaanapali: Add MPAM MSC nodes for the L2 caches Yin Li
2026-10-28 12:05 ` sashiko-bot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ba4afee7-5c3b-43fe-9703-9cd42e0fadca@oss.qualcomm.com \
--to=srivathsa.rao@oss.qualcomm.com \
--cc=aiqun.yu@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=andre.przywara@arm.com \
--cc=ben.horgan@arm.com \
--cc=catalin.marinas@arm.com \
--cc=conor+dt@kernel.org \
--cc=dakr@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=driver-core@lists.linux.dev \
--cc=fenghuay@nvidia.com \
--cc=fustini@kernel.org \
--cc=ganapatrao.kulkarni@oss.qualcomm.com \
--cc=gregkh@linuxfoundation.org \
--cc=gshan@redhat.com \
--cc=huang.yiwei@oss.qualcomm.com \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=james.morse@arm.com \
--cc=jic23@kernel.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=rafael@kernel.org \
--cc=reinette.chatre@intel.com \
--cc=robh@kernel.org \
--cc=sdonthineni@nvidia.com \
--cc=tan.shaopeng@jp.fujitsu.com \
--cc=trilok.soni@oss.qualcomm.com \
--cc=yin.li@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox