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Wed, 29 Jul 2026 11:40:53 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: AB9oMyFLfqdZ Date: Wed, 29 Jul 2026 17:40:32 +0200 From: "Arnd Bergmann" To: "Rosen Penev" , sashiko-reviews@lists.linux.dev Cc: devicetree@vger.kernel.org, "Conor Dooley" , "Rob Herring" , "Florian Fainelli" Message-Id: In-Reply-To: References: <20260628231156.1254012-1-rosenp@gmail.com> <20260628232714.BD9581F000E9@smtp.kernel.org> Subject: Re: [PATCH] ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable I saw this in the fixes pull request, and the descriptions below don't make much sense to me. I'll hold off on the pull request until someone can come up with a fix that they can accurately describe. On Sat, Jul 4, 2026, at 00:17, Rosen Penev wrote: > On Sun, Jun 28, 2026 at 4:27=E2=80=AFPM wrote: >> >> Thank you for your contribution! Sashiko AI review found 1 potential = issue(s) to consider: >> - [High] Removing the PCI memory ranges from the parent `axi@18000000= ` bus breaks outbound PCIe memory mapping because the child `pcie` nodes= can no longer translate their addresses to CPU physical addresses. This makes sense to me, but doesn't explain what caused the observed bug >> commit 4f061464281d4964ce46dab60d36a09328f14862 >> Author: Rosen Penev >> >> ARM: dts: BCM5301X: drop extra AXI bus ranges that break PCIe >> >> This commit removes extra AXI bus ranges that overlap with DRAM on >> BCM5301X/BCM470X SoCs. The intention is to restore the original >> single-entry mapping and fix PCIe routing issues. The DRAM ranges on this chip are at 0x00000000 and 0x88000000 and don't overlap with the axi bus ranges at 0x18000000/0x08000000/0x20000000/0x28000000, so the initial analysis is wrong. > With need_ob_cfg =3D false (no brcm,pcie-ob in bcm-ns.dtsi), > iproc_pcie_map_ranges() is never called. The bootloader has already > configured the PCIe controller's outbound windows correctly. By > removing the extra AXI bus ranges, of_translate_address() fails, those > bogus resources are skipped (the OF_BAD_ADDR check at > drivers/pci/of.c:377), and the kernel stops registering DRAM addresses > as PCI MMIO windows. The hardware continues working with its > pre-configured outbound windows. This sounds like the bootloader configured ranges don't match the ones in the devicetree description, which would leave three options: - change the bootloader to match the dts - change the dts to match the bootloader - change the driver to reconfigure the windows according to DT Can you check how the OB windows are actually configured by the bootloader on your board? Arnd