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Wed, 26 Jun 2024 04:31:23 -0700 (PDT) Received: from [10.178.66.211] ([192.19.176.219]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-444e0d07b28sm37861781cf.36.2024.06.26.04.31.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jun 2024 04:31:22 -0700 (PDT) Message-ID: Date: Wed, 26 Jun 2024 12:31:17 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/7] dt-bindings: interrupt-controller: Add bcm2712 MSI-X DT bindings To: Stanimir Varbanov , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Broadcom internal kernel review list Cc: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jim Quinlan , Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , kw@linux.com, Philipp Zabel , Andrea della Porta , Phil Elwell , Jonathan Bell References: <20240626104544.14233-1-svarbanov@suse.de> <20240626104544.14233-2-svarbanov@suse.de> From: Florian Fainelli Autocrypt: addr=florian.fainelli@broadcom.com; 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protocol="application/pkcs7-signature"; micalg=sha-256; boundary="000000000000aa586b061bc95a08" --000000000000aa586b061bc95a08 Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 26/06/2024 11:45, Stanimir Varbanov wrote: > Adds DT bindings for bcm2712 MSI-X interrupt peripheral controller. > > Signed-off-by: Stanimir Varbanov > --- > .../brcm,bcm2712-msix.yaml | 74 +++++++++++++++++++ > 1 file changed, 74 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml > new file mode 100644 > index 000000000000..ca610e4467d9 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml > @@ -0,0 +1,74 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2712-msix.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Broadcom bcm2712 MSI-X Interrupt Peripheral support > + > +maintainers: > + - Stanimir Varbanov > + > +description: > > + This interrupt controller is used to provide intterupt vectors to the > + generic interrupt controller (GIC) on bcm2712. It will be used as > + external MSI-X controller for PCIe root complex. > + > +allOf: > + - $ref: /schemas/interrupt-controller/msi-controller.yaml# > + > +properties: > + compatible: > + items: > + - enum: > + - "brcm,bcm2712-mip-intc" > + reg: > + maxItems: 1 > + description: > > + Specifies the base physical address and size of the registers > + > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 2 > + > + msi-controller: true > + > + brcm,msi-base-spi: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: The SGI number that MSIs start. > + > + brcm,msi-num-spis: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: The number of SGIs for MSIs. > + > + brcm,msi-offset: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Shift the allocated MSIs up by N. > + > + brcm,msi-pci-addr: > + $ref: /schemas/types.yaml#/definitions/uint64 > + description: MSI-X message address. > + > +additionalProperties: false > + > +required: > + - compatible > + - reg > + - interrupt-controller > + - "#interrupt-cells" > + - msi-controller From the implementation of the driver, it looks like all properties are required, except for brcm,msi-offset which has a fallback to the value 0. -- Florian --000000000000aa586b061bc95a08 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="smime.p7s" Content-Description: S/MIME Cryptographic Signature MIIQeQYJKoZIhvcNAQcCoIIQajCCEGYCAQExDzANBglghkgBZQMEAgEFADALBgkqhkiG9w0BBwGg gg3QMIIFDTCCA/WgAwIBAgIQeEqpED+lv77edQixNJMdADANBgkqhkiG9w0BAQsFADBMMSAwHgYD VQQLExdHbG9iYWxTaWduIFJvb3QgQ0EgLSBSMzETMBEGA1UEChMKR2xvYmFsU2lnbjETMBEGA1UE AxMKR2xvYmFsU2lnbjAeFw0yMDA5MTYwMDAwMDBaFw0yODA5MTYwMDAwMDBaMFsxCzAJBgNVBAYT AkJFMRkwFwYDVQQKExBHbG9iYWxTaWduIG52LXNhMTEwLwYDVQQDEyhHbG9iYWxTaWduIEdDQyBS MyBQZXJzb25hbFNpZ24gMiBDQSAyMDIwMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA 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