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Fri, 15 Nov 2024 06:43:01 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AF6h0xX014079 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 15 Nov 2024 06:43:00 GMT Received: from [10.233.17.145] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 14 Nov 2024 22:42:50 -0800 Message-ID: Date: Fri, 15 Nov 2024 14:42:47 +0800 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] arm64: dts: qcom: qcs8300: enable pcie0 for QCS8300 To: Dmitry Baryshkov CC: Konrad Dybcio , Ziyue Zhang , , , , , , , , , , , , , , , , , , , , , References: <20241114095409.2682558-1-quic_ziyuzhan@quicinc.com> <20241114095409.2682558-5-quic_ziyuzhan@quicinc.com> <26943ea3-109c-473d-818b-2a08dba859ab@oss.qualcomm.com> <288be342-952b-4210-afe7-6e194dfd54a9@quicinc.com> From: Tingwei Zhang In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: B-EQsEH5OUakbYjiFEDH5wuxrJBqyiqs X-Proofpoint-ORIG-GUID: B-EQsEH5OUakbYjiFEDH5wuxrJBqyiqs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=923 mlxscore=0 malwarescore=0 suspectscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411150055 On 11/15/2024 2:26 PM, Dmitry Baryshkov wrote: > On Fri, Nov 15, 2024 at 12:59:12PM +0800, Tingwei Zhang wrote: >> On 11/14/2024 9:03 PM, Konrad Dybcio wrote: >>> On 14.11.2024 1:10 PM, Dmitry Baryshkov wrote: >>>> On Thu, Nov 14, 2024 at 05:54:08PM +0800, Ziyue Zhang wrote: >>>>> Add configurations in devicetree for PCIe0, including registers, clocks, >>>>> interrupts and phy setting sequence. >>>>> >>>>> Signed-off-by: Ziyue Zhang >>>>> --- >>>>> arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 44 +++++- >>>>> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 176 ++++++++++++++++++++++ >>>>> 2 files changed, 219 insertions(+), 1 deletion(-) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts >>>>> index 7eed19a694c3..9d7c8555ed38 100644 >>>>> --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts >>>>> +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts >>>>> @@ -213,7 +213,7 @@ vreg_l9c: ldo9 { >>>>> &gcc { >>>> >>>> The patch doesn't seem to update the gcc node in qcs8300.dtsi. Is there >>>> any reason to have the clocks property in the board data file? >>> >>> Definitely not. Ziyue, please move that change to the soc dtsi >> >> Gcc node is updated in board device tree due to sleep_clk is defined in >> board device tree. Sleep_clk is from PMIC instead SoC so we were requested >> to move sleep_clk to board device tree in previous review [1]. > > Note, the review doesn't talk about sleep_clk at all. The recent > examples (sm8650, x1e80100, sa8775p) still pull the clocks into the SoC > dtsi, but without the freq. > It's begining of the discussion of the PMIC clock for SoC. Sleep clock specific discussion is here [2]. [2]https://lore.kernel.org/all/be8b573c-db4e-4eec-a9a6-3cd83d04156d@kernel.org/ >> >> [1]https://lore.kernel.org/all/10914199-1e86-4a2e-aec8-2a48cc49ef14@kernel.org/ >>> >>> Konrad >> >> >> -- >> Thanks, >> Tingwei >> >> -- >> linux-phy mailing list >> linux-phy@lists.infradead.org >> https://lists.infradead.org/mailman/listinfo/linux-phy > -- Thanks, Tingwei