From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF29CEB64DD for ; Mon, 7 Aug 2023 05:22:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229759AbjHGFW6 (ORCPT ); Mon, 7 Aug 2023 01:22:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229580AbjHGFW5 (ORCPT ); Mon, 7 Aug 2023 01:22:57 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3CA34113; Sun, 6 Aug 2023 22:22:56 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3775MofM104866; Mon, 7 Aug 2023 00:22:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691385770; bh=o43BVAIwu1eTDn8xtuDb7nxNe4jYXLcrI+Wj3Fyn1T4=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=RnZL1LOVWeuU6nw8s+bF1t6gnxE8lK9tdxVr34/9BxVvwwk+apwRRaS3VpVw+UXHt 2IPZcX0S7DbEcXMm9dY0jUkO1qgHFjkabcksM49Cas3Dn6GuM17dfe+TkvQ+PyYzmr pclJ7Go56bERbDrjgAO7qoRrvIvMV2VZttW2QdjI= Received: from DFLE101.ent.ti.com (dfle101.ent.ti.com [10.64.6.22]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3775Mo3L006638 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 7 Aug 2023 00:22:50 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 7 Aug 2023 00:22:50 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 7 Aug 2023 00:22:49 -0500 Received: from [172.24.227.68] (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3775MkI2028422; Mon, 7 Aug 2023 00:22:47 -0500 Message-ID: Date: Mon, 7 Aug 2023 10:52:46 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 01/13] arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level Content-Language: en-US To: Andrew Davis , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , CC: , References: <20230802205309.257392-1-afd@ti.com> <20230802205309.257392-2-afd@ti.com> From: Dhruva Gole In-Reply-To: <20230802205309.257392-2-afd@ti.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 03/08/23 02:22, Andrew Davis wrote: > SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete > and will not be functional unless they are extended. > > As the attached SD/eMMC is only known about at the board integration level, > these nodes should only be enabled when provided with this information. > > Disable the SDHCI nodes in the dtsi files and only enable the ones that > are actually pinned out on a given board. > > Signed-off-by: Andrew Davis > --- > arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 7 ++----- > arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 7 ++----- > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 3 +++ > arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 11 +---------- > 4 files changed, 8 insertions(+), 20 deletions(-) > [snip] Reviewed-by: Dhruva Gole -- Thanks and Regards, Dhruva Gole