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From: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Martin Blumenstingl
	<martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>,
	knaack.h-Mmb7MZpHnFY@public.gmane.org,
	lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org,
	pmeerw-jW+XmwGofnusTnJN9+BGXg@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org,
	khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 2/3] iio: adc: meson-saradc: add Meson8b SoC compatibility
Date: Wed, 26 Apr 2017 07:29:46 +0100	[thread overview]
Message-ID: <bcaf354e-9e6b-a45a-6822-3efeb99058cf@kernel.org> (raw)
In-Reply-To: <20170417182820.26670-3-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>

On 17/04/17 19:28, Martin Blumenstingl wrote:
> Meson GX SoCs however use some magic bits to prevent simultaneous (=
> conflicting, because only consumer should use the FIFO buffer with the
> ADC results) usage by the Linux kernel and the bootloader (the BL30
> bootloader uses the SAR ADC to read the CPU temperature).
> This patch changes guards all BL30 functionality so it is skipped on
> SoCs which don't have it. Since the hardware itself doesn't know whether
> BL30 is available the internal meson_sar_adc_data is extended so this
> information can be provided per of_device_id.data inside the driver.
> 
> Additionally the clocks "adc_clk" and "adc_sel" are not provided by the
> clock-controller itself. "adc_sel" is not available at all. "adc_clk"
> is provided by the SAR ADC IP block itself on Meson8b (and earlier).
> This is already supported by the meson_saradc driver.
> 
> Finally a new of_device_id for the Meson8b SoC is added so it can be
> wired up in the corresponding DT.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
Fine apart from what superficially looks like a cut and paste error inline...

Jonathan
> ---
>  drivers/iio/adc/meson_saradc.c | 80 +++++++++++++++++++++++++++++-------------
>  1 file changed, 56 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
> index dd4190b50df6..cf13691009ee 100644
> --- a/drivers/iio/adc/meson_saradc.c
> +++ b/drivers/iio/adc/meson_saradc.c
> @@ -220,6 +220,7 @@ enum meson_sar_adc_chan7_mux_sel {
>  };
>  
>  struct meson_sar_adc_data {
> +	bool					has_bl30_integration;
>  	unsigned int				resolution;
>  	const char				*name;
>  };
> @@ -437,19 +438,24 @@ static int meson_sar_adc_lock(struct iio_dev *indio_dev)
>  
>  	mutex_lock(&indio_dev->mlock);
>  
> -	/* prevent BL30 from using the SAR ADC while we are using it */
> -	regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELAY,
> -			   MESON_SAR_ADC_DELAY_KERNEL_BUSY,
> -			   MESON_SAR_ADC_DELAY_KERNEL_BUSY);
> -
> -	/* wait until BL30 releases it's lock (so we can use the SAR ADC) */
> -	do {
> -		udelay(1);
> -		regmap_read(priv->regmap, MESON_SAR_ADC_DELAY, &val);
> -	} while (val & MESON_SAR_ADC_DELAY_BL30_BUSY && timeout--);
> -
> -	if (timeout < 0)
> -		return -ETIMEDOUT;
> +	if (priv->data->has_bl30_integration) {
> +		/* prevent BL30 from using the SAR ADC while we are using it */
> +		regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELAY,
> +				MESON_SAR_ADC_DELAY_KERNEL_BUSY,
> +				MESON_SAR_ADC_DELAY_KERNEL_BUSY);
> +
> +		/*
> +		 * wait until BL30 releases it's lock (so we can use the SAR
> +		 * ADC)
> +		 */
> +		do {
> +			udelay(1);
> +			regmap_read(priv->regmap, MESON_SAR_ADC_DELAY, &val);
> +		} while (val & MESON_SAR_ADC_DELAY_BL30_BUSY && timeout--);
> +
> +		if (timeout < 0)
> +			return -ETIMEDOUT;
> +	}
>  
>  	return 0;
>  }
> @@ -458,9 +464,10 @@ static void meson_sar_adc_unlock(struct iio_dev *indio_dev)
>  {
>  	struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
>  
> -	/* allow BL30 to use the SAR ADC again */
> -	regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELAY,
> -			   MESON_SAR_ADC_DELAY_KERNEL_BUSY, 0);
> +	if (priv->data->has_bl30_integration)
> +		/* allow BL30 to use the SAR ADC again */
> +		regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELAY,
> +				MESON_SAR_ADC_DELAY_KERNEL_BUSY, 0);
>  
>  	mutex_unlock(&indio_dev->mlock);
>  }
> @@ -614,14 +621,16 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
>  	 */
>  	meson_sar_adc_set_chan7_mux(indio_dev, CHAN7_MUX_CH7_INPUT);
>  
> -	/*
> -	 * leave sampling delay and the input clocks as configured by BL30 to
> -	 * make sure BL30 gets the values it expects when reading the
> -	 * temperature sensor.
> -	 */
> -	regmap_read(priv->regmap, MESON_SAR_ADC_REG3, &regval);
> -	if (regval & MESON_SAR_ADC_REG3_BL30_INITIALIZED)
> -		return 0;
> +	if (priv->data->has_bl30_integration) {
> +		/*
> +		 * leave sampling delay and the input clocks as configured by
> +		 * BL30 to make sure BL30 gets the values it expects when
> +		 * reading the temperature sensor.
> +		 */
> +		regmap_read(priv->regmap, MESON_SAR_ADC_REG3, &regval);
> +		if (regval & MESON_SAR_ADC_REG3_BL30_INITIALIZED)
> +			return 0;
> +	}
>  
>  	meson_sar_adc_stop_sample_engine(indio_dev);
>  
> @@ -834,23 +843,46 @@ static const struct iio_info meson_sar_adc_iio_info = {
>  	.driver_module = THIS_MODULE,
>  };
>  
> +struct meson_sar_adc_data meson_sar_adc_meson8_data = {
> +	.has_bl30_integration = false,
> +	.resolution = 10,
> +	.name = "meson-meson8b-saradc",
Not meson-meson8-saradc?
> +};
> +
> +struct meson_sar_adc_data meson_sar_adc_meson8b_data = {
> +	.has_bl30_integration = false,
> +	.resolution = 10,
> +	.name = "meson-meson8b-saradc",
> +};
> +
>  struct meson_sar_adc_data meson_sar_adc_gxbb_data = {
> +	.has_bl30_integration = true,
>  	.resolution = 10,
>  	.name = "meson-gxbb-saradc",
>  };
>  
>  struct meson_sar_adc_data meson_sar_adc_gxl_data = {
> +	.has_bl30_integration = true,
>  	.resolution = 12,
>  	.name = "meson-gxl-saradc",
>  };
>  
>  struct meson_sar_adc_data meson_sar_adc_gxm_data = {
> +	.has_bl30_integration = true,
>  	.resolution = 12,
>  	.name = "meson-gxm-saradc",
>  };
>  
>  static const struct of_device_id meson_sar_adc_of_match[] = {
>  	{
> +		.compatible = "amlogic,meson8-saradc",
> +		.data = &meson_sar_adc_meson8_data,
> +	},
> +	{
> +		.compatible = "amlogic,meson8b-saradc",
> +		.data = &meson_sar_adc_meson8b_data,
> +	},
> +	{
>  		.compatible = "amlogic,meson-gxbb-saradc",
>  		.data = &meson_sar_adc_gxbb_data,
>  	}, {
> 

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  parent reply	other threads:[~2017-04-26  6:29 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-17 18:28 [PATCH 0/3] Meson8 / Meson8b support for the meson_saradc driver Martin Blumenstingl
     [not found] ` <20170417182820.26670-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-04-17 18:28   ` [PATCH 1/3] Documentation: dt-bindings: iio: adc: add Meson8 and Meson8b support Martin Blumenstingl
     [not found]     ` <20170417182820.26670-2-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-04-20 14:21       ` Rob Herring
2017-04-17 18:28   ` [PATCH 2/3] iio: adc: meson-saradc: add Meson8b SoC compatibility Martin Blumenstingl
     [not found]     ` <20170417182820.26670-3-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-04-26  6:29       ` Jonathan Cameron [this message]
2017-04-17 18:28   ` [PATCH 3/3] iio: adc: meson-saradc: mark all meson_sar_adc_data static and const Martin Blumenstingl
     [not found]     ` <20170417182820.26670-4-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-04-26  6:31       ` Jonathan Cameron

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