From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9865C433F5 for ; Fri, 8 Apr 2022 13:36:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236348AbiDHNiw (ORCPT ); Fri, 8 Apr 2022 09:38:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236340AbiDHNiv (ORCPT ); Fri, 8 Apr 2022 09:38:51 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1D9C10BD08; Fri, 8 Apr 2022 06:36:47 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id 2C7A51F47188 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1649425006; bh=9XQVJ/N+Dc94X8yCqDsgthkWlD10Vdhk6Lt9n5h9RdI=; h=Date:From:Subject:To:Cc:References:In-Reply-To:From; b=bzXIPcJCQ7bcSuMsfdu/WYkCxdyGs7HZ1QZX8aL+AhPXJzWNSYlmTtVKF1vUKH4O2 4WKGDlrTxU8+GHWu8rF43EVpuuRagcW2ykv7E93gITHMXlIECALOkY8pngDMPzTAF5 yDJY9VqLa0xxBJL6NBpc104Fvwnu2OqRwNGWZ6yTgReci8cjn1QjNMh1HmSnfLh4I3 xW1B/Sr0xKZFPj9+M4yccNuI++FqLTh9tM+Lh4vgBtAYxdPRIGK9AQfiiCY+aSyKX9 5kjr2HXVs7UZf01nGXK5z7qF39Dj09l1Z92GKV9gaTEXl2dtkT1aaJ95n/ZQZHz0pQ /lPl1jSguZxHg== Message-ID: Date: Fri, 8 Apr 2022 15:36:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 From: AngeloGioacchino Del Regno Subject: Re: [PATCH V2 05/15] cpufreq: mediatek: Enable clocks and regulators To: Rex-BC Chen , rafael@kernel.org, viresh.kumar@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org Cc: matthias.bgg@gmail.com, jia-wei.chang@mediatek.com, roger.lu@mediatek.com, hsinyi@google.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com, "Andrew-sh . Cheng" References: <20220408045908.21671-1-rex-bc.chen@mediatek.com> <20220408045908.21671-6-rex-bc.chen@mediatek.com> Content-Language: en-US In-Reply-To: <20220408045908.21671-6-rex-bc.chen@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Il 08/04/22 06:58, Rex-BC Chen ha scritto: > From: Jia-Wei Chang > > We need to enable regulators so that the max and min requested values will > be recorded. > The intermediate clock is not always enabled by CCF in different projects, > so we should enable it in the cpufreq driver. > > Signed-off-by: Andrew-sh.Cheng > Signed-off-by: Jia-Wei Chang > Signed-off-by: Rex-BC Chen Reviewed-by: AngeloGioacchino Del Regno