From: Jie Gan <jie.gan@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: kaanapali: enable ETR and CTCU devices
Date: Wed, 2 Sep 2026 13:59:04 +0800 [thread overview]
Message-ID: <bcdc95df-92a9-4b85-83d0-d8abf71501f0@oss.qualcomm.com> (raw)
In-Reply-To: <20260831-enable-ctcu-etr-for-knp-v1-1-8dbd3ff15ed4@oss.qualcomm.com>
On 8/31/2026 7:34 PM, Jie Gan wrote:
> Embedded Trace Router(ETR) is working as a DDR memory sink to collect
> tracing data from source device and the CTCU device serves as the
> control unit for the ETR device.
>
Please ignore this patch, I already sent it before and got reviewed by
Konrad. Sorry for the mistake.
https://lore.kernel.org/all/b9bd5d63-787f-41c6-ae7b-8543a7b6c4c6@oss.qualcomm.com/
Thanks,
Jie
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/kaanapali.dtsi | 181 ++++++++++++++++++++++++++++++++
> 1 file changed, 181 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> index 131fd2a16c54..6fc1399a7e5e 100644
> --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> @@ -4421,40 +4421,69 @@ cmd-pins {
> pins = "sdc2_cmd";
> drive-strength = <2>;
> bias-pull-up;
> };
>
> data-pins {
> pins = "sdc2_data";
> drive-strength = <2>;
> bias-pull-up;
> };
>
> card-detect-pins {
> pins = "gpio55";
> function = "gpio";
> drive-strength = <2>;
> bias-pull-up;
> };
> };
> };
>
> + ctcu@10001000 {
> + compatible = "qcom,kaanapali-ctcu", "qcom,sa8775p-ctcu";
> + reg = <0x0 0x10001000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + ctcu_in0: endpoint {
> + remote-endpoint = <&tmc_etr_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + ctcu_in1: endpoint {
> + remote-endpoint = <&tmc_etr1_out>;
> + };
> + };
> + };
> + };
> +
> stm@10002000 {
> compatible = "arm,coresight-stm", "arm,primecell";
> reg = <0x0 0x10002000 0x0 0x1000>,
> <0x0 0x16280000 0x0 0x180000>;
> reg-names = "stm-base",
> "stm-stimulus-base";
>
> clocks = <&aoss_qmp>;
> clock-names = "apb_pclk";
>
> out-ports {
> port {
> stm_out: endpoint {
> remote-endpoint = <&funnel_in0_in7>;
> };
> };
> };
> };
>
> tpdm@10003000 {
> @@ -4560,40 +4589,155 @@ funnel_in0_in6: endpoint {
> };
>
> port@7 {
> reg = <7>;
>
> funnel_in0_in7: endpoint {
> remote-endpoint = <&stm_out>;
> };
> };
> };
>
> out-ports {
> port {
> funnel_in0_out: endpoint {
> remote-endpoint = <&funnel_aoss_in6>;
> };
> };
> };
> };
>
> + replicator@10046000 {
> + compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
> + reg = <0x0 0x10046000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + replicator_qdss_in: endpoint {
> + remote-endpoint = <&replicator_swao_out0>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + replicator_qdss_out: endpoint {
> + remote-endpoint = <&replicator_etr_in>;
> + };
> + };
> + };
> + };
> +
> + tmc@10048000 {
> + compatible = "arm,coresight-tmc", "arm,primecell";
> + reg = <0x0 0x10048000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + iommus = <&apps_smmu 0x04e0 0x0>;
> + arm,scatter-gather;
> +
> + in-ports {
> + port {
> + tmc_etr_in: endpoint {
> + remote-endpoint = <&replicator_etr_out0>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + tmc_etr_out: endpoint {
> + remote-endpoint = <&ctcu_in0>;
> + };
> + };
> + };
> + };
> +
> + replicator@1004e000 {
> + compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
> + reg = <0x0 0x1004e000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + replicator_etr_in: endpoint {
> + remote-endpoint = <&replicator_qdss_out>;
> + };
> + };
> + };
> +
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + replicator_etr_out0: endpoint {
> + remote-endpoint = <&tmc_etr_in>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + replicator_etr_out1: endpoint {
> + remote-endpoint = <&tmc_etr1_in>;
> + };
> + };
> + };
> + };
> +
> + tmc@1004f000 {
> + compatible = "arm,coresight-tmc", "arm,primecell";
> + reg = <0x0 0x1004f000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + iommus = <&apps_smmu 0x0500 0x0>;
> + arm,scatter-gather;
> +
> + in-ports {
> + port {
> + tmc_etr1_in: endpoint {
> + remote-endpoint = <&replicator_etr_out1>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + tmc_etr1_out: endpoint {
> + remote-endpoint = <&ctcu_in1>;
> + };
> + };
> + };
> + };
> +
> tpdm@11000000 {
> compatible = "qcom,coresight-tpdm", "arm,primecell";
> reg = <0x0 0x11000000 0x0 0x1000>;
>
> clocks = <&aoss_qmp>;
> clock-names = "apb_pclk";
> label = "tpdm_modem_0";
>
> qcom,dsb-element-bits = <32>;
> qcom,dsb-msrs-num = <32>;
>
> out-ports {
> port {
> tpdm_modem0_out: endpoint {
> remote-endpoint = <&tpda_modem_in0>;
> };
> };
> };
> };
>
> @@ -5374,40 +5518,77 @@ funnel_aoss_out: endpoint {
> remote-endpoint = <&tmc_etf_in>;
> };
> };
> };
> };
>
> tmc@11305000 {
> compatible = "arm,coresight-tmc", "arm,primecell";
> reg = <0x0 0x11305000 0x0 0x1000>;
>
> clocks = <&aoss_qmp>;
> clock-names = "apb_pclk";
>
> in-ports {
> port {
> tmc_etf_in: endpoint {
> remote-endpoint = <&funnel_aoss_out>;
> };
> };
> };
> +
> + out-ports {
> + port {
> + tmc_etf_out: endpoint {
> + remote-endpoint = <&replicator_swao_in>;
> + };
> + };
> + };
> + };
> +
> + replicator@11306000 {
> + compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
> + reg = <0x0 0x11306000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + replicator_swao_in: endpoint {
> + remote-endpoint = <&tmc_etf_out>;
> + };
> + };
> + };
> +
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + replicator_swao_out0: endpoint {
> + remote-endpoint = <&replicator_qdss_in>;
> + };
> + };
> + };
> };
>
> tpda@11308000 {
> compatible = "qcom,coresight-tpda", "arm,primecell";
> reg = <0x0 0x11308000 0x0 0x1000>;
>
> clocks = <&aoss_qmp>;
> clock-names = "apb_pclk";
>
> in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> port@0 {
> reg = <0>;
>
> tpda_aoss_in0: endpoint {
> remote-endpoint = <&tpdm_swao_prio0_out>;
> };
> };
>
> ---
> base-commit: e30626823a406725ce29bc75cb8ec467d3e1e326
> change-id: 20260831-enable-ctcu-etr-for-knp-28434e777f1e
>
> Best regards,
next prev parent reply other threads:[~2026-09-02 5:59 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-31 11:34 [PATCH] arm64: dts: qcom: kaanapali: enable ETR and CTCU devices Jie Gan
2026-09-02 5:59 ` Jie Gan [this message]
-- strict thread matches above, loose matches on Subject: below --
2026-07-14 8:05 Jie Gan
2026-07-15 9:39 ` Konrad Dybcio
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