From: Andrew Lunn <andrew@lunn.ch>
To: dimitri.fedrau@liebherr.com
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Andrew Davis <afd@ti.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Dimitri Fedrau <dima.fedrau@gmail.com>
Subject: Re: [PATCH net-next 2/2] net: phy: dp83822: Add support for GPIO2 clock output
Date: Mon, 9 Dec 2024 14:17:04 +0100 [thread overview]
Message-ID: <bcef90db-ca9d-4c52-9dc5-2f59ae858824@lunn.ch> (raw)
In-Reply-To: <20241209-dp83822-gpio2-clk-out-v1-2-fd3c8af59ff5@liebherr.com>
> #define MII_DP83822_RCSR 0x17
> #define MII_DP83822_RESET_CTRL 0x1f
> #define MII_DP83822_GENCFG 0x465
> +#define MII_DP83822_IOCTRL2 0x463
> #define MII_DP83822_SOR1 0x467
These are sorted, so the MII_DP83822_IOCTRL2 should go before
MII_DP83822_GENCFG.
> + if (dp83822->set_gpio2_clk_out)
> + phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_IOCTRL2,
I would of preferred MDIO_MMD_VEND2 rather than DP83822_DEVADDR, but
having just this one instance correct would look a bit odd.
> + ret = of_property_read_u32(dev->of_node, "ti,gpio2-clk-out",
> + &dp83822->gpio2_clk_out);
> + if (!ret) {
> + dp83822->set_gpio2_clk_out = true;
> + switch (dp83822->gpio2_clk_out) {
> + case DP83822_CLK_SRC_MAC_IF:
> + break;
> + case DP83822_CLK_SRC_XI:
> + break;
> + case DP83822_CLK_SRC_INT_REF:
> + break;
> + case DP83822_CLK_SRC_RMII_MASTER_MODE_REF:
> + break;
> + case DP83822_CLK_SRC_FREE_RUNNING:
> + break;
> + case DP83822_CLK_SRC_RECOVERED:
> + break;
You can list multiple case statements together, and have one break at
the end.
I would personally also only have:
> + dp83822->set_gpio2_clk_out = true;
if validation passes, not that it really matters because:
> + default:
> + phydev_err(phydev, "ti,gpio2-clk-out value %u not valid\n",
> + dp83822->gpio2_clk_out);
> + return -EINVAL;
> + }
> + }
Andrew
---
pw-bot: cr
next prev parent reply other threads:[~2024-12-09 13:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-09 8:01 [PATCH net-next 0/2] net: phy: dp83822: Add support for GPIO2 clock output Dimitri Fedrau via B4 Relay
2024-12-09 8:01 ` [PATCH net-next 1/2] dt-bindings: net: " Dimitri Fedrau via B4 Relay
2024-12-09 8:01 ` [PATCH net-next 2/2] net: phy: " Dimitri Fedrau via B4 Relay
2024-12-09 13:17 ` Andrew Lunn [this message]
2024-12-09 13:52 ` Dimitri Fedrau
2024-12-09 14:45 ` Andrew Lunn
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