From: Neha Malcom Francis <n-francis@ti.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: <nm@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<u-kumar1@ti.com>
Subject: Re: [PATCH 1/2] dt-bindings: misc: bist: Add BIST dt-binding for TI K3 devices
Date: Thu, 27 Mar 2025 09:42:38 +0530 [thread overview]
Message-ID: <bd7bee62-38fd-412b-a2d4-611890238e9e@ti.com> (raw)
In-Reply-To: <a2397c92-2884-4f4d-b036-808208892af5@kernel.org>
On 24/03/25 12:53, Krzysztof Kozlowski wrote:
> On 19/03/2025 10:02, Neha Malcom Francis wrote:
>> Hi Krzysztof,
>>
>> On 19/03/25 13:16, Krzysztof Kozlowski wrote:
>>> On 13/03/2025 12:14, Neha Malcom Francis wrote:
>>>> Hi Krzysztof
>>>>
>>>> On 29/11/24 14:45, Krzysztof Kozlowski wrote:
>>>>> On 29/11/2024 08:43, Neha Malcom Francis wrote:
>>>>>>>> +
>>>>>>>> + power-domains:
>>>>>>>> + maxItems: 1
>>>>>>>> +
>>>>>>>> + ti,bist-instance:
>>>>>>>> + $ref: /schemas/types.yaml#/definitions/uint32
>>>>>>>> + description:
>>>>>>>> + the BIST instance in the SoC represented as an integer
>>>>>>>
>>>>>>> No instance indices are allowed. Drop.
>>>>>>>
>>>>>>
>>>>>> Question on this, this is not a property that is driven by software but rather
>>>>>> indicates which register sequences have to be picked up for triggering this test
>>>>>> from this instance. So I don't see how I can workaround this without getting
>>>>>> this number. Or maybe call it ID rather than instance?
>>>>>
>>>>> I don't understand how the device operates, so what is exactly behind
>>>>> some sequences of registers for triggering this test. You described
>>>>> property as index or ID of one instance of the block. That's not what we
>>>>> want in the binding. That's said maybe other, different hardware
>>>>> characteristic is behind, who knows. Or maybe it's about callers... or
>>>>> maybe that's not hardware property at all, but runtime OS, who knows.
>>>>>
>>>>
>>>> Sorry for such a late reply, but I was hoping to get more details on
>>>> this "ID" and never got back to the thread...
>>>>
>>>> The best way I can describe is this device (BIST) runs a safety
>>>> diagnostic test on a bunch of processors/blocks (let's call them
>>>> targets). There's a mapping between the instance of this device and the
>>>> targets it will run the test. This ID was essentially letting the BIST
>>>> driver know which are these targets.
>>>
>>>
>>> So you want to configure some target? Then this is your property. If you
>>> want to configure 'foo' difference in DT, you do not write 'bar'...
>>>
>>
>> So the difficulty in doing this is, what I mentioned in the earlier
>> email just copying it over again:
>>
>> "Yet another way would be the BIST points out the targets it controls via
>> their phandles in its node... but this approach would trigger the probe
>
> No, it would not. Which part of OF kernel code causes probe ordering
> (device links) if some random phandle appears?
Going through device links now, I realize I may have come to the wrong
conclusion while writing the driver. Let me try to respin the driver
using this approach then post which I will resume this series.
>
>> of these targets before the test runs on them. And in hardware, the test
>> must run only one before the device is used, else we see indefinite
>> behavior."
>>
>> Property that has a list of strings (targets) instead of phandles maybe?
>> Would that be acceptable?
>
>
>
> Best regards,
> Krzysztof
--
Thanking You
Neha Malcom Francis
next prev parent reply other threads:[~2025-03-27 4:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-28 14:08 [PATCH 0/2] Add support for K3 BIST Neha Malcom Francis
2024-11-28 14:08 ` [PATCH 1/2] dt-bindings: misc: bist: Add BIST dt-binding for TI K3 devices Neha Malcom Francis
2024-11-29 7:20 ` Krzysztof Kozlowski
2024-11-29 7:43 ` Neha Malcom Francis
2024-11-29 9:15 ` Krzysztof Kozlowski
2025-03-13 11:14 ` Neha Malcom Francis
2025-03-19 7:46 ` Krzysztof Kozlowski
2025-03-19 9:02 ` Neha Malcom Francis
2025-03-24 7:23 ` Krzysztof Kozlowski
2025-03-27 4:12 ` Neha Malcom Francis [this message]
2024-11-28 14:08 ` [PATCH 2/2] arm64: dts: ti: k3-j784s4-main: Add PBIST_14 node Neha Malcom Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=bd7bee62-38fd-412b-a2d4-611890238e9e@ti.com \
--to=n-francis@ti.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kristo@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=krzk@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nm@ti.com \
--cc=robh@kernel.org \
--cc=u-kumar1@ti.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox