Re: [PATCH 3/8] arm64: dts: ti: k3-am62: Set MMC clock pins as OUTPUT

["Mendez, Judith" <jm@ti.com>]

Hi all,

Responding to sashiko review.

On 7/29/2026 3:08 PM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> 
> Pre-existing issues:
> - [High] This problem wasn't introduced by this patch, but the commit fails to apply the necessary AM62x SoC hardware constraint to several third-party device trees. While it correctly updates the TI SK and Beagle boards' MMC clock pins to `PIN_OUTPUT` to disable the receiver per the TRM (SPRUIV7), boards like the Toradex Verdin, PHYTEC phyCORE, TQ, and Variscite AM62x SOMs still incorrectly define MMC0/1/2 clock pins as `PIN_INPUT` or `PIN_INPUT_PULLDOWN`. As this is an underlying SoC requirement, all boards integrating the AM62x SoC must implement the correct pad configuration.
> --
> 
> --- Patch [3]: [PATCH 3/8] arm64: dts: ti: k3-am62: Set MMC clock pins as OUTPUT ---
> commit 7601627985b20fa80186e314fd493c2b9a330fe1
> Author: Judith Mendez <jm@ti.com>
> 
> arm64: dts: ti: k3-am62: Set MMC clock pins as OUTPUT
> 
> This commit updates the MMC clock pin configuration on various AM62x boards to
> use PIN_OUTPUT. This matches the TRM requirement to disable the receiver for
> these pins.
> 
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
>> index dfd65c00f5b95..7fd508f4eddf1 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts
>> @@ -86,7 +86,7 @@ main_mmc0_pins_default: main-mmc0-default-pins {
>>   		bootph-all;
>>   		pinctrl-single,pins = <
>>   			AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (V3) MMC0_CMD */
>> -			AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (Y1) MMC0_CLK */
>> +			AM62X_IOPAD(0x218, PIN_OUTPUT, 0) /* (Y1) MMC0_CLK */
> 
> [Severity: High]
> This isn't a bug introduced by this patch, but while this updates the TI SK and
> Beagle boards to use PIN_OUTPUT for MMC clock pins, it looks like several
> third-party AM62x boards still define these pins as PIN_INPUT or
> PIN_INPUT_PULLDOWN.
> 
> For example:
> 
> arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi:pinctrl_sdhci0()
>      AM62X_IOPAD(0x218, PIN_INPUT,        0) /* (AB1) MMC0_CLK  */
> 
> arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi:main_mmc0_pins_default()
>      AM62X_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB1) MMC0_CLK */
> 
> arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi:main_mmc1_pins_default()
>      AM62X_IOPAD(0x234, PIN_INPUT_PULLDOWN, 0) /* (B22) MMC1_CLK */
> 
> arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi:main_mmc0_pins_default()
>      AM62AX_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB7) MMC0_CLK */
> 
> arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi:main_mmc0_pins()
>      AM62X_IOPAD(0x218, PIN_INPUT, 0)
> 
> Since this is an underlying AM62x SoC hardware requirement from the TRM, should
> these other device trees also be updated to prevent potential signal integrity
> issues and intermittent SD/eMMC I/O failures?

As far as I know, this issue is more of a documentation fix and does not
prevent potential signal integrity issues.

~ Judith

>