From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FE4CC433F5 for ; Sun, 29 May 2022 14:17:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230190AbiE2OR4 (ORCPT ); Sun, 29 May 2022 10:17:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229988AbiE2OR4 (ORCPT ); Sun, 29 May 2022 10:17:56 -0400 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 22F0C424A0 for ; Sun, 29 May 2022 07:17:54 -0700 (PDT) Received: by mail-wr1-x42d.google.com with SMTP id k19so3387634wrd.8 for ; Sun, 29 May 2022 07:17:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=message-id:date:mime-version:user-agent:subject:content-language:to :cc:references:from:in-reply-to:content-transfer-encoding; bh=/RnfxhSLHWEjSCyFNvqAeRKPEvIyVsMYATgYIDOeUYE=; b=gtGgZD/A1/wTM853GAqUrzpPiZ5JaqQgtxz+HIjUCukO7rPAU7rGdCnCHCuzr8IEOe xfEhOT4GDWCzwuF+23FGd3GCro32fdfh09W/IU4IJamxOQD1a52gVbQDC4vknRgz7TEo Wx4IUS0oRYKipYrAM8Sy2PbERc+c8+xf5u8sqe5kKPX91pX0r9b87Fj67VGTk4OkiFza d+6ofh9TpQaFhGKGRoG2A2vmOFguK1zlstIBAqrbl1Whcz6LKiC44n+eKMfAnmwjKPvy Oxm282ZARG3io0owHbZ6tNQx4nTQyLxfNmZah8lYdJMZMNjpNq2pCEQbyGCF/mhl1Q2k I0Fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:cc:references:from:in-reply-to :content-transfer-encoding; bh=/RnfxhSLHWEjSCyFNvqAeRKPEvIyVsMYATgYIDOeUYE=; b=bjQvG+pi/A0Oy1kjhYcxa0qU2xPdrETWs2r6R5so48S/pvan+PJ7uJuJvcmgKW9c6q fLv3hX80XKc9GyU8d2DQl6+Cd+kHLpyL+UOaasz4INVR0Z4ha7uHtI+x4yQR1AEF9Lw4 2V5er/7KCXBvXA6u+fXekX1TaX0ueyKGYKS1NsbXNRh1irJ6d6wGiKBvL3fD4YPtmUb5 tFVKQ3+dnMbusWYRkXtfFRv3uiILQ6EV5qqI1AVj3NCjLPM38txjwk068HLRQLwKKPRV TldXoYF6dTCH+tUgf7LJKFEcqkaJatvSx2RDOgaW1bkMbYALesDil5DThKQyhfa3TPyi Q/5A== X-Gm-Message-State: AOAM532gv1IuywqECleQqEoP6r8Ya6xBSj7T7A2Q8UoB+foskGvzvjRz u4dWd4VIRfautZIFwEmQlwWrfw== X-Google-Smtp-Source: ABdhPJxxj2WCq+u40b+fBt+evXm6Gk2mAMTOS6PArrddcDWFCfj9E/42mU/De1uVcnixaNi7YmD03w== X-Received: by 2002:a5d:59ae:0:b0:20f:d007:be25 with SMTP id p14-20020a5d59ae000000b0020fd007be25mr30003634wrr.336.1653833872723; Sun, 29 May 2022 07:17:52 -0700 (PDT) Received: from [192.168.0.177] (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id e9-20020a5d5949000000b002103136623esm1230449wri.85.2022.05.29.07.17.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 29 May 2022 07:17:52 -0700 (PDT) Message-ID: Date: Sun, 29 May 2022 16:17:51 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH V3] dt-bindings: dma: fsl-edma: Convert to DT schema Content-Language: en-US To: "Peng Fan (OSS)" , vkoul@kernel.org, dmaengine@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, joy.zou@nxp.com, Peng Fan References: <20220527020507.392765-1-peng.fan@oss.nxp.com> From: Krzysztof Kozlowski In-Reply-To: <20220527020507.392765-1-peng.fan@oss.nxp.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 27/05/2022 04:05, Peng Fan (OSS) wrote: > From: Peng Fan > > Convert the eDMA controller binding to DT schema. > > Signed-off-by: Peng Fan > --- > > V3: > Address Krzysztof's comments, for reg/interrupts/clock-names > > V2: > Typo fix > Correct interrupts/interrupt-names/AllOf > > > .../devicetree/bindings/dma/fsl,edma.yaml | 155 ++++++++++++++++++ > .../devicetree/bindings/dma/fsl-edma.txt | 111 ------------- > arch/arm64/boot/dts/freescale/imx93.dtsi | 2 +- > 3 files changed, 156 insertions(+), 112 deletions(-) > create mode 100644 Documentation/devicetree/bindings/dma/fsl,edma.yaml > delete mode 100644 Documentation/devicetree/bindings/dma/fsl-edma.txt > > diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml > new file mode 100644 > index 000000000000..050e6cd57727 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml > @@ -0,0 +1,155 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/fsl,edma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale enhanced Direct Memory Access(eDMA) Controller > + > +description: | > + The eDMA channels have multiplex capability by programmable > + memory-mapped registers. channels are split into two groups, called > + DMAMUX0 and DMAMUX1, specific DMA request source can only be multiplexed > + by any channel of certain group, DMAMUX0 or DMAMUX1, but not both. > + > +maintainers: > + - Peng Fan > + > +properties: > + compatible: > + oneOf: > + - enum: > + - fsl,vf610-edma > + - fsl,imx7ulp-edma > + - items: > + - const: fsl,ls1028a-edma > + - const: fsl,vf610-edma > + > + reg: > + minItems: 2 > + maxItems: 3 > + > + interrupts: > + minItems: 2 > + maxItems: 17 > + > + interrupt-names: > + minItems: 2 > + maxItems: 17 > + > + "#dma-cells": > + const: 2 > + > + dma-channels: > + const: 32 > + > + clocks: > + maxItems: 2 > + > + clock-names: > + maxItems: 2 > + > + big-endian: > + description: | > + If present registers and hardware scatter/gather descriptors of the > + eDMA are implemented in big endian mode, otherwise in little mode. > + type: boolean > + > +required: > + - "#dma-cells" > + - compatible > + - reg > + - interrupts > + - clocks > + - dma-channels > + > +allOf: > + - $ref: "dma-controller.yaml#" > + - if: > + properties: > + compatible: > + contains: > + const: fsl,vf610-edma > + then: > + properties: > + clock-names: > + items: > + - const: dmamux0 > + - const: dmamux1 > + interrupts: > + maxItems: 2 > + interrupt-names: > + items: > + - const: edma-tx > + - const: edma-err > + reg: > + maxItems: 3 > + > + - if: > + properties: > + compatible: > + contains: > + const: fsl,imx7ulp-edma > + then: > + properties: > + clock-names: > + items: > + - const: dma > + - const: dmamux0 > + interrupts: > + maxItems: 17 Looks good, although the information about order of interrupts is lost during conversion. The original bindings had: "total 16 channel interrupt and 1 error interrupt(located in the last)" Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof