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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH v5 2/7] dt-bindings: soc: starfive: Add StarFive syscon module Content-Language: en-US To: Xingyu Wu , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Philipp Zabel , Conor Dooley , Emil Renner Berthing Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Hal Feng , William Qiu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org References: <20230613125852.211636-1-xingyu.wu@starfivetech.com> <20230613125852.211636-3-xingyu.wu@starfivetech.com> From: Krzysztof Kozlowski In-Reply-To: <20230613125852.211636-3-xingyu.wu@starfivetech.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 13/06/2023 14:58, Xingyu Wu wrote: > From: William Qiu > > Add documentation to describe StarFive System Controller Registers. > > Co-developed-by: Xingyu Wu > Signed-off-by: Xingyu Wu > Signed-off-by: William Qiu > --- > .../soc/starfive/starfive,jh7110-syscon.yaml | 62 +++++++++++++++++++ > MAINTAINERS | 7 +++ > 2 files changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > > diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > new file mode 100644 > index 000000000000..a81190f8a54d > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > @@ -0,0 +1,62 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: StarFive JH7110 SoC system controller > + > +maintainers: > + - William Qiu > + > +description: | Do not need '|' unless you need to preserve formatting. > + The StarFive JH7110 SoC system controller provides register information such > + as offset, mask and shift to configure related modules such as MMC and PCIe. > + > +properties: > + compatible: > + oneOf: > + - items: > + - const: starfive,jh7110-sys-syscon > + - const: syscon > + - const: simple-mfd > + - items: > + - enum: > + - starfive,jh7110-aon-syscon > + - starfive,jh7110-stg-syscon > + - const: syscon > + > + reg: > + maxItems: 1 > + > + clock-controller: > + $ref: /schemas/clock/starfive,jh7110-pll.yaml# > + type: object > + > + "#power-domain-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: starfive,jh7110-aon-syscon > + then: > + required: > + - "#power-domain-cells" > + > +additionalProperties: false > + > +examples: > + - | > + syscon@10240000 { > + compatible = "starfive,jh7110-stg-syscon", "syscon"; > + reg = <0x10240000 0x1000>; Extend example - add clock controller, add power-domains to STG (since it has them, as you claim in the binding). Make this one example complete. Best regards, Krzysztof