devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Icenowy Zheng <uwu@icenowy.me>
To: Robin Murphy <robin.murphy@arm.com>,
	"Lad, Prabhakar" <prabhakar.csengg@gmail.com>,
	Jisheng Zhang <jszhang@kernel.org>
Cc: "Drew Fustini" <dfustini@baylibre.com>,
	"Christoph Hellwig" <hch@lst.de>,
	"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"Robert Nelson" <robertcnelson@gmail.com>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Guo Ren" <guoren@kernel.org>, "Fu Wei" <wefu@redhat.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Conor Dooley" <conor@kernel.org>,
	"Jason Kridner" <jkridner@beagleboard.org>,
	"Xi Ruoyao" <xry111@xry111.site>, "Han Gao" <gaohan@iscas.ac.cn>,
	linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	"Björn Töpel" <bjorn@kernel.org>,
	"Alexandre Ghiti" <alexghiti@rivosinc.com>,
	Linux-MM <linux-mm@kvack.org>
Subject: Re: [PATCH 0/6] RISC-V: Add eMMC support for TH1520 boards
Date: Wed, 04 Oct 2023 22:46:49 +0800	[thread overview]
Message-ID: <be4e43b676ca5619e99b0f5abf228e45fadedb70.camel@icenowy.me> (raw)
In-Reply-To: <a568a9dd-bab2-1e23-c4d5-9f6475bdcc3b@arm.com>

在 2023-10-04星期三的 15:18 +0100,Robin Murphy写道:
> On 04/10/2023 3:02 pm, Icenowy Zheng wrote:
> [...]
> > > > > I believe commit 484861e09f3e ("soc: renesas: Kconfig: Select
> > > > > the
> > > > > required configs for RZ/Five SoC") can cause regression on
> > > > > all
> > > > > non-dma-coherent riscv platforms with generic defconfig. This
> > > > > is
> > > > > a common issue. The logic here is: generic riscv defconfig
> > > > > selects
> > > > > ARCH_R9A07G043 which selects DMA_GLOBAL_POOL, which assumes
> > > > > all
> > > > > non-dma-coherent riscv platforms have a dma global pool, this
> > > > > assumption
> > > > > seems not correct. And I believe DMA_GLOBAL_POOL should not
> > > > > be
> > > > > selected by ARCH_SOCFAMILIY, instead, only ARCH under some
> > > > > specific
> > > > > conditions can select it globaly, for example NOMMU ARM and
> > > > > so
> > > > > on.
> > > > > 
> > > > > Since this is a regression, what's proper fix? any suggestion
> > > > > is
> > > > > appreciated.
> > > 
> > > I think the answer is to not select DMA_GLOBAL_POOL, since that
> > > is
> > > only
> > 
> > Well I think for RISC-V, it's not NOMMU only but applicable for
> > every
> > core that does not support Svpbmt or vendor-specific alternatives,
> > because the original RISC-V priv spec does not define memory
> > attributes
> > in page table entries.
> > 
> > For the Renesas/Andes case I think a pool is set by OpenSBI with
> > vendor-specific M-mode facility and then passed in DT, and the S-
> > mode
> > (which MMU is enabled in) just sees fixed memory attributes, in
> > this
> > case I think DMA_GLOBAL_POOL is needed.
> 
> Oh wow, is that really a thing? In that case, either you just can't 
> support this platform in a multi-platform kernel, or someone needs to
> do 

Emmmm thus RZ/Five should `depends on NONPORTABLE`?

> some fiddly work in dma-direct to a) introduce the notion of an
> optional 
> global pool, and b) make it somehow cope with DMA_DIRECT_REMAP being 
> enabled but non-functional.
> 
> Thanks,
> Robin.


  reply	other threads:[~2023-10-04 14:47 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-22  1:49 [PATCH 0/6] RISC-V: Add eMMC support for TH1520 boards Drew Fustini
2023-09-22  1:49 ` [PATCH 1/6] dt-bindings: mmc: sdhci-of-dwcmhsc: Add T-Head TH1520 support Drew Fustini
2023-09-22  9:57   ` Conor Dooley
2023-09-22 15:18     ` Drew Fustini
2023-09-23  8:10       ` Guo Ren
2023-09-24 21:04         ` Drew Fustini
2023-09-22  1:49 ` [PATCH 2/6] mmc: sdhci: add __sdhci_execute_tuning() to header Drew Fustini
2023-09-25 10:21   ` Adrian Hunter
2023-09-25 10:23     ` Xi Ruoyao
2023-09-25 10:31       ` Adrian Hunter
2023-09-25 14:41     ` Drew Fustini
2023-09-22  1:49 ` [PATCH 3/6] mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520 Drew Fustini
2023-09-25 10:35   ` Adrian Hunter
2023-09-25 14:43     ` Drew Fustini
2023-10-04 16:19   ` Jisheng Zhang
2023-10-04 19:12     ` Drew Fustini
2023-09-22  1:49 ` [PATCH 4/6] riscv: dts: thead: Add TH1520 mmc controller and sdhci clock Drew Fustini
2023-09-22  1:49 ` [PATCH 5/6] riscv: dts: thead: Enable BeagleV Ahead eMMC controller Drew Fustini
2023-09-22  1:49 ` [PATCH 6/6] riscv: dts: thead: Enable LicheePi 4A " Drew Fustini
2023-09-22 11:41 ` [PATCH 0/6] RISC-V: Add eMMC support for TH1520 boards Xi Ruoyao
2023-09-22 16:23   ` Drew Fustini
2023-09-23 16:33     ` Xi Ruoyao
2023-09-23  0:11   ` Icenowy Zheng
2023-09-22 19:08 ` Robert Nelson
2023-09-22 22:48   ` Robert Nelson
2023-10-03  4:37     ` Drew Fustini
2023-10-04 11:30       ` Jisheng Zhang
2023-10-04 13:02         ` Lad, Prabhakar
2023-10-04 13:49           ` Robin Murphy
2023-10-04 14:02             ` Icenowy Zheng
2023-10-04 14:18               ` Robin Murphy
2023-10-04 14:46                 ` Icenowy Zheng [this message]
2023-10-04 14:58                 ` Icenowy Zheng
2023-10-04 16:03                 ` Lad, Prabhakar
2023-10-04 17:16                   ` Lad, Prabhakar
2023-10-04 18:49                     ` Samuel Holland
2023-10-04 19:38                       ` Robin Murphy
2023-10-04 20:47                         ` Lad, Prabhakar
2023-10-05  6:57                     ` Christoph Hellwig
2023-10-04 14:06             ` Jisheng Zhang
2023-10-04 15:27               ` Geert Uytterhoeven

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=be4e43b676ca5619e99b0f5abf228e45fadedb70.camel@icenowy.me \
    --to=uwu@icenowy.me \
    --cc=adrian.hunter@intel.com \
    --cc=alexghiti@rivosinc.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=bjorn@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=conor@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dfustini@baylibre.com \
    --cc=gaohan@iscas.ac.cn \
    --cc=guoren@kernel.org \
    --cc=hch@lst.de \
    --cc=jkridner@beagleboard.org \
    --cc=jszhang@kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mm@kvack.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=prabhakar.csengg@gmail.com \
    --cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
    --cc=robertcnelson@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=robin.murphy@arm.com \
    --cc=ulf.hansson@linaro.org \
    --cc=wefu@redhat.com \
    --cc=xry111@xry111.site \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).