From: Thor Thayer <thor.thayer@linux.intel.com>
To: Dinh Nguyen <dinguyen@kernel.org>,
robh+dt@kernel.org, mark.rutland@arm.com, bp@alien8.de,
mchehab@kernel.org
Cc: devicetree@vger.kernel.org, linux-edac@vger.kernel.org
Subject: Re: [PATCH 3/6] arm64: dts: stratix10: Add SDRAM node
Date: Mon, 24 Sep 2018 15:42:40 -0500 [thread overview]
Message-ID: <be83e407-cd7d-79cf-7666-ec2c2bf4ff26@linux.intel.com> (raw)
In-Reply-To: <a454c7fb-be98-7573-7fd8-54a41c86c703@kernel.org>
On 09/24/2018 10:40 AM, Dinh Nguyen wrote:
>
>
> On 09/19/2018 02:38 PM, thor.thayer@linux.intel.com wrote:
>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>
>> Add the SDRAM node to follow the Arria10 layout and
>> bindings. The Arria10 SDRAM functions expect this
>> node.
>>
>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>> ---
>> arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> index 78b4b06e8935..ee1d4b8ba631 100644
>> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
>> @@ -467,6 +467,11 @@
>> status = "disabled";
>> };
>>
>> + sdr: sdr@ffc25000 {
>
> Should this be "sdr: sdr@f8011100" ?
>
Whoops. Yes, you are correct. I'll fix and resubmit. Thanks!
>> + compatible = "altr,sdr-ctl", "syscon";
>> + reg = <0xf8011100 0xc0>;
>> + };
>> +
>> eccmgr {
>
>
> Dinh
>
next prev parent reply other threads:[~2018-09-24 20:42 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-19 19:38 [PATCH 0/6] Add Peripheral EDACs to SOCFPGA Stratix10 thor.thayer
2018-09-19 19:38 ` [PATCH 1/6] arm64: dts: stratix10: Additions to EDAC System Manager thor.thayer
2018-09-24 15:37 ` Dinh Nguyen
2018-09-19 19:38 ` [PATCH 2/6] EDAC, altera: Combine Stratix10 and Arria10 probe functions thor.thayer
2018-09-19 19:38 ` [PATCH 3/6] arm64: dts: stratix10: Add SDRAM node thor.thayer
2018-09-24 15:40 ` Dinh Nguyen
2018-09-24 20:42 ` Thor Thayer [this message]
2018-09-24 22:27 ` Dinh Nguyen
2018-09-19 19:38 ` [PATCH 4/6] EDAC, altera: Merge Stratix10 into Arria10 SDRAM probe thor.thayer
2018-09-19 19:39 ` [PATCH 5/6] EDAC, altera: Add Stratix10 peripheral support thor.thayer
2018-09-19 19:39 ` [PATCH 6/6] arm64: dts: stratix10: Add peripheral EDAC nodes thor.thayer
2018-09-24 15:41 ` Dinh Nguyen
2018-09-24 10:40 ` [PATCH 0/6] Add Peripheral EDACs to SOCFPGA Stratix10 Borislav Petkov
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