From: Faiyaz Mohammed <faiyaz.mohammed@oss.qualcomm.com>
To: sashiko-reviews@lists.linux.dev
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: cache: qcom,llcc: allow optional second interrupt for LCP/SRP ECC
Date: Wed, 21 Oct 2026 17:13:53 +0530 [thread overview]
Message-ID: <be848b5c-8d66-426c-8dca-4358317e2a89@oss.qualcomm.com> (raw)
In-Reply-To: <sashiko-outbox-171513@kernel.org>
On 14-10-2026 21:35, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Low] dt-bindings: missing maxItems constraint for legacy interrupts
> --
>
> commit 50febfa0c04f4bae15f676db2e6662c8855b0e3c
> Author: Faiyaz Mohammed <faiyaz.mohammed@oss.qualcomm.com>
>
> dt-bindings: cache: qcom,llcc: allow optional second interrupt for LCP/SRP ECC
>
> QCM2390 (Shikra) has an LCP/SRP block that signals DDR DRAM ECC errors
> on a dedicated interrupt line separate from the existing TRP/DRP cache
> ECC interrupt. This commit allows an optional second interrupt in the
> LLCC binding and enforces both are present for qcom,shikra-llcc.
>
>> diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
>> index 2141e5d4de63b..3546cf7c25195 100644
>> --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
>> +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
>> @@ -64,7 +64,17 @@ properties:
>> maxItems: 18
>>
>> interrupts:
>> - maxItems: 1
>> + minItems: 1
>> + items:
>> + - description: TRP/DRP LLCC cache ECC (ddrss_apps_interrupt[2])
>> + - description: LCP/SRP DDR DRAM ECC (ddrss_apps_interrupt[1]), present
>> + on platforms with an LCP/SRP block such as QCM2390
>
> [Severity: Low]
> Does this implicitly raise the maximum number of interrupts to 2 for all
> compatible strings?
>
> Since maxItems: 1 was removed globally, a device tree for older hardware
> could erroneously define two interrupts without failing schema validation.
>
>> +
>> + interrupt-names:
>> + minItems: 1
>> + items:
>> + - const: llcc-ecc
>> + - const: llcc-lcp-ecc
>>
>> memory-region:
>> maxItems: 1
>
> [ ... ]
>
>> @@ -234,6 +244,20 @@ allOf:
>> - const: llcc1_base
>> - const: llcc_broadcast_base
>>
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: qcom,shikra-llcc
>> + then:
>> + properties:
>> + interrupts:
>> + minItems: 2
>> + interrupt-names:
>> + minItems: 2
>> + required:
>> + - interrupt-names
>> +
>
> [Severity: Low]
> Should there be an else clause here to restrict legacy platforms back to
> maxItems: 1 for interrupts and interrupt-names?
>
Valid finding — without an else clause a non-Shikra platform can declare
two interrupts without failing schema validation. Fixed in v2 by adding
an else branch to the allOf block:
else:
properties:
interrupts:
maxItems: 1
interrupt-names:
maxItems: 1
platforms except qcom,shikra-llcc, which requires both.
This restores the original single-interrupt constraint for all
Thanks & regards,
Mohammed Faiyaz
next prev parent reply other threads:[~2026-10-21 11:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-14 15:56 [PATCH 0/4] edac: qcom: add DDR DRAM ECC reporting for Shikra (QCM2390) Faiyaz Mohammed
2026-10-14 15:56 ` [PATCH 1/4] dt-bindings: cache: qcom,llcc: allow optional second interrupt for LCP/SRP ECC Faiyaz Mohammed
2026-10-14 16:05 ` sashiko-bot
2026-10-21 11:43 ` Faiyaz Mohammed [this message]
2026-10-17 16:34 ` Krzysztof Kozlowski
2026-10-21 11:47 ` Faiyaz Mohammed
2026-10-14 15:56 ` [PATCH 2/4] soc: qcom: llcc: add LCP/SRP DDR DRAM ECC register offsets Faiyaz Mohammed
2026-10-16 17:20 ` Jonathan Cameron
2026-10-21 11:49 ` Faiyaz Mohammed
2026-10-17 16:34 ` Krzysztof Kozlowski
2026-10-21 11:54 ` Faiyaz Mohammed
2026-10-14 15:56 ` [PATCH 3/4] edac: qcom: add LCP/SRP DDR DRAM ECC support for Shikra Faiyaz Mohammed
2026-10-14 16:09 ` sashiko-bot
2026-10-21 11:58 ` Faiyaz Mohammed
2026-10-16 17:26 ` Jonathan Cameron
2026-10-21 12:01 ` Faiyaz Mohammed
2026-10-14 15:56 ` [PATCH 4/4] arm64: dts: qcom: shikra: add LCP/SRP ECC interrupt to LLCC node Faiyaz Mohammed
2026-10-14 16:08 ` sashiko-bot
2026-10-21 12:03 ` Faiyaz Mohammed
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