From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.4 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7B3BC352A2 for ; Fri, 7 Feb 2020 11:23:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8BA5A20726 for ; Fri, 7 Feb 2020 11:23:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="ehVM/iIZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726860AbgBGLX4 (ORCPT ); Fri, 7 Feb 2020 06:23:56 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:10542 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726674AbgBGLXz (ORCPT ); Fri, 7 Feb 2020 06:23:55 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 07 Feb 2020 03:22:55 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 07 Feb 2020 03:23:54 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 07 Feb 2020 03:23:54 -0800 Received: from [10.24.44.92] (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 7 Feb 2020 11:23:49 +0000 CC: , "perex@perex.cz" , "tiwai@suse.com" , "robh+dt@kernel.org" , "broonie@kernel.org" , "lgirdwood@gmail.com" , "thierry.reding@gmail.com" , "jonathanh@nvidia.com" , "alsa-devel@alsa-project.org" , "devicetree@vger.kernel.org" , "linux-tegra@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "sharadg@nvidia.com" , "mkumard@nvidia.com" , "viswanathl@nvidia.com" , "rlokhande@nvidia.com" , "dramesh@nvidia.com" , "atalambedu@nvidia.com" Subject: Re: [PATCH v2 4/9] ASoC: tegra: add Tegra210 based I2S driver To: David Laight , 'Dmitry Osipenko' References: <1580380422-3431-1-git-send-email-spujar@nvidia.com> <1580380422-3431-5-git-send-email-spujar@nvidia.com> <3a586a6b-5f53-dc44-b9fc-67c633c626ef@gmail.com> <90ae7badcb3441daa8144233de8f6825@AcuMS.aculab.com> From: Sameer Pujar Message-ID: Date: Fri, 7 Feb 2020 16:53:45 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <90ae7badcb3441daa8144233de8f6825@AcuMS.aculab.com> X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: quoted-printable Content-Language: en-GB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1581074575; bh=ZddZAhdQ+7CGcCBN+PpuH4oNPpiNVDulArnMHC1dZrI=; h=X-PGP-Universal:CC:Subject:To:References:From:Message-ID:Date: User-Agent:MIME-Version:In-Reply-To:X-Originating-IP: X-ClientProxiedBy:Content-Type:Content-Transfer-Encoding: Content-Language; b=ehVM/iIZ7eZPVLh7aunXLnqExOarktq9fSo597dkmZXz32g65RggQW3VFIk3s0h5f NN3TrRsEuffMhKs4TLRMbwt8o7f+4F7FG7N1kskfmk0uDsCRkUS1PqC0QNfPv+xcpt dbmYHdAbwUz/BdLKHgjRgXbo+7F3iBvp77kewxVbmIezWY101ME0vEa9Qd6eUzLq17 YBSZFjSwqcDK8/mejHIbI5CoCy7q2f3lBZFTNvGvj2hO7wm7i+ewWnUe1Wp7XHwf6b Rm3H9D35dIqONnO2T16SJbkVfQcNizG5P39oM2M02FXAuN+nTQMhI94UsiTbo0zxQw deDxvOCBNXfiw== Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 2/6/2020 10:36 PM, David Laight wrote: > External email: Use caution opening links or attachments > > > From: f Dmitry Osipenko >> Sent: 06 February 2020 16:59 >> >> 30.01.2020 13:33, Sameer Pujar =D0=BF=D0=B8=D1=88=D0=B5=D1=82: >> ... >>> +static const int tegra210_cif_fmt[] =3D { >>> + 0, >>> + TEGRA_ACIF_BITS_16, >>> + TEGRA_ACIF_BITS_32, >>> +}; >>> + >>> +static const int tegra210_i2s_bit_fmt[] =3D { >>> + 0, >>> + I2S_BITS_16, >>> + I2S_BITS_32, >>> +}; >>> + >>> +static const int tegra210_i2s_sample_size[] =3D { >>> + 0, >>> + 16, >>> + 32, >>> +}; >> static const *unsigned* int? > Or get rid of the table lookups completely. > Assuming the index is never zero then the value > can be calculated as (const_a + const_b * index). All above tables are mapped to tegra210_i2s_format_text[].=20 Additions/removal of entries will require changes in equation. It is=20 better keep the mapping as it is. > > David > > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1= 1PT, UK > Registration No: 1397386 (Wales)