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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Jishnu Prakash <quic_jprakash@quicinc.com>,
	jic23@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	agross@kernel.org, andersson@kernel.org,
	konrad.dybcio@linaro.org, daniel.lezcano@linaro.org,
	dmitry.baryshkov@linaro.org, linus.walleij@linaro.org,
	linux-arm-msm@vger.kernel.org, andriy.shevchenko@linux.intel.com,
	quic_subbaram@quicinc.com, quic_collinsd@quicinc.com,
	quic_amelende@quicinc.com, quic_kamalw@quicinc.com,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	marijn.suijten@somainline.org
Cc: lars@metafoo.de, luca@z3ntu.xyz, linux-iio@vger.kernel.org,
	lee@kernel.org, rafael@kernel.org, rui.zhang@intel.com,
	lukasz.luba@arm.com, cros-qcom-dts-watchers@chromium.org,
	sboyd@kernel.org, linux-pm@vger.kernel.org,
	linux-arm-msm-owner@vger.kernel.org, kernel@quicinc.com
Subject: Re: [PATCH V2 1/3] dt-bindings: iio: adc: Add QCOM PMIC5 Gen3 ADC bindings
Date: Thu, 21 Dec 2023 09:04:04 +0100	[thread overview]
Message-ID: <bea6c2ed-c47b-4bbe-8cda-6e28fd2fcea8@linaro.org> (raw)
In-Reply-To: <716cf526-59e3-e755-0a47-ff9ae496e87c@quicinc.com>

On 21/12/2023 09:00, Jishnu Prakash wrote:
> Hi Krzysztof,
> 
> On 11/16/2023 5:13 PM, Krzysztof Kozlowski wrote:
>> On 16/11/2023 04:25, Jishnu Prakash wrote:
>>> For the PMIC5-Gen3 type PMICs, ADC peripheral is present in HW for the
>>> following PMICs: PMK8550, PM8550, PM8550B and PM8550VX PMICs.
>>>
>> A nit, subject: drop second/last, redundant "bindings". The
>> "dt-bindings" prefix is already stating that these are bindings.
>>
>>>   
>>>     reg:
>>> -    description: VADC base address in the SPMI PMIC register map
>>> -    maxItems: 1
>> NAK.
>>
>> I wrote it multiple times. You canno remove the widest constraints from
>> top-level property.
>>
> 
>>>     '#io-channel-cells':
>>>       const: 1
>>>   
>>>     interrupts:
>>> -    maxItems: 1
>> No, srsly. We went through it.
> 
> 
> Is it fine if I add the bindings for ADC5 Gen3 in a new file? It's not 
> just for the reg and interrupts properties, I think it would make sense 
> to have a new file as ADC5 Gen3 is a new device combining the functions 
> of the existing QCOM VADC and ADC_TM devices.
> 

The patch is no longer in my mailbox, that was more than a month ago.

Best regards,
Krzysztof


  reply	other threads:[~2023-12-21  8:04 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-16  3:25 [PATCH V2 0/3] iio: adc: Add support for QCOM SPMI PMIC5 Gen3 ADC Jishnu Prakash
2023-11-16  3:25 ` [PATCH V2 1/3] dt-bindings: iio: adc: Add QCOM PMIC5 Gen3 ADC bindings Jishnu Prakash
2023-11-16 11:43   ` Krzysztof Kozlowski
2023-12-21  8:00     ` Jishnu Prakash
2023-12-21  8:04       ` Krzysztof Kozlowski [this message]
2023-11-16  5:22 ` [PATCH V2 0/3] iio: adc: Add support for QCOM SPMI PMIC5 Gen3 ADC Dmitry Baryshkov
2023-11-16  6:29   ` Jishnu Prakash
2023-11-16  6:58     ` Dmitry Baryshkov
2023-11-25 19:35       ` Jonathan Cameron
2023-11-20 11:31 ` Andy Shevchenko

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