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Sat, 30 May 2020 14:19:33 -0700 (PDT) Subject: Re: [PATCH v2 4/4] pinctrl: bcm2835: Add support for wake-up interrupts To: Stefan Wahren , Florian Fainelli , linux-kernel@vger.kernel.org Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Geert Uytterhoeven , Scott Branden , Ray Jui , Linus Walleij , Matti Vaittinen , "open list:PIN CONTROL SUBSYSTEM" , Rob Herring , "maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE..." , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , Nicolas Saenz Julienne , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" References: <20200529191522.27938-1-f.fainelli@gmail.com> <20200529191522.27938-5-f.fainelli@gmail.com> <2677905e-a9ad-a44e-93bc-ad185aa269de@i2se.com> From: Florian Fainelli Message-ID: Date: Sat, 30 May 2020 14:19:28 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Firefox/68.0 Thunderbird/68.8.1 MIME-Version: 1.0 In-Reply-To: <2677905e-a9ad-a44e-93bc-ad185aa269de@i2se.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 5/30/2020 12:49 AM, Stefan Wahren wrote: > Hi Florian, > > Am 29.05.20 um 21:15 schrieb Florian Fainelli: >> Leverage the IRQCHIP_MASK_ON_SUSPEND flag in order to avoid having to >> specifically treat the GPIO interrupts during suspend and resume, and >> simply implement an irq_set_wake() callback that is responsible for >> enabling the parent wake-up interrupt as a wake-up interrupt. >> >> To avoid allocating unnecessary resources for other chips, the wake-up >> interrupts are only initialized if we have a brcm,bcm7211-gpio >> compatibility string. >> >> Signed-off-by: Florian Fainelli >> --- >> drivers/pinctrl/bcm/pinctrl-bcm2835.c | 76 ++++++++++++++++++++++++++- >> 1 file changed, 75 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c >> index 1b00d93aa66e..1fbf067a3eed 100644 >> --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c >> +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c >> @@ -19,6 +19,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -76,6 +77,7 @@ >> struct bcm2835_pinctrl { >> struct device *dev; >> void __iomem *base; >> + int *wake_irq; >> >> /* note: locking assumes each bank will have its own unsigned long */ >> unsigned long enabled_irq_map[BCM2835_NUM_BANKS]; >> @@ -435,6 +437,11 @@ static void bcm2835_gpio_irq_handler(struct irq_desc *desc) >> chained_irq_exit(host_chip, desc); >> } >> >> +static irqreturn_t bcm2835_gpio_wake_irq_handler(int irq, void *dev_id) >> +{ >> + return IRQ_HANDLED; >> +} >> + >> static inline void __bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc, >> unsigned reg, unsigned offset, bool enable) >> { >> @@ -634,6 +641,34 @@ static void bcm2835_gpio_irq_ack(struct irq_data *data) >> bcm2835_gpio_set_bit(pc, GPEDS0, gpio); >> } >> >> +static int bcm2835_gpio_irq_set_wake(struct irq_data *data, unsigned int on) >> +{ >> + struct gpio_chip *chip = irq_data_get_irq_chip_data(data); >> + struct bcm2835_pinctrl *pc = gpiochip_get_data(chip); >> + unsigned gpio = irqd_to_hwirq(data); >> + unsigned int irqgroup; >> + int ret = -EINVAL; >> + >> + if (!pc->wake_irq) >> + return ret; >> + >> + if (gpio <= 27) >> + irqgroup = 0; >> + else if (gpio >= 28 && gpio <= 45) >> + irqgroup = 1; >> + else if (gpio >= 46 && gpio <= 53) >> + irqgroup = 2; > in case the BCM7211 has 58 GPIOs, but the wake up interrupts are only > available for the first 54 this should deserve a comment. irqgroup 2 covers GPIOs 46 through 57, thanks for noticing. Do you have more comments before I spin a v3? Thank you for reviewing. -- Florian