From: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
To: linux-kernel@vger.kernel.org, kishon@ti.com, vkoul@kernel.org
Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org,
devicetree@vger.kernel.org, p.zabel@pengutronix.de,
andriy.shevchenko@intel.com, balbi@kernel.org,
cheol.yong.kim@intel.com, qi-ming.wu@intel.com,
yin1.li@intel.com
Subject: Re: [PATCH v8 0/2] phy: Add USB PHY support on Intel LGM SoC
Date: Fri, 21 Aug 2020 15:51:21 +0800 [thread overview]
Message-ID: <bf2301f3-7c70-06b1-898c-f18284babe75@linux.intel.com> (raw)
In-Reply-To: <20200817031249.36795-1-vadivel.muruganx.ramuthevar@linux.intel.com>
Hi Kishon, Vinod,
Gentle reminder!, kindly can you please merge this series of patches, as
those patches got Reviewed-By Philipp Zabel and Rob Herring, Thanks!
Please do the needful.
Regards
Vadivel
On 17/8/2020 11:12 am, Ramuthevar,Vadivel MuruganX wrote:
> The USB PHY provides the optimized for low power dissipation while active, idle, or on standby.
> Requires minimal external components, a single resistor, for best operation.
> Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
> ---
> v8:
> - Rebase to V5.9-rc1
prev parent reply other threads:[~2020-08-21 7:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-17 3:12 [PATCH v8 0/2] phy: Add USB PHY support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-08-17 3:12 ` [PATCH v8 1/2] dt-bindings: phy: Add USB PHY support for " Ramuthevar,Vadivel MuruganX
2020-08-17 3:12 ` [PATCH v8 2/2] phy: Add USB3 " Ramuthevar,Vadivel MuruganX
2020-08-17 6:08 ` Felipe Balbi
2020-08-17 6:34 ` Ramuthevar, Vadivel MuruganX
2020-08-21 7:51 ` Ramuthevar, Vadivel MuruganX [this message]
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