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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 2/1/24 6:03 AM, Roger Quadros wrote: > Exposing the entire CTRL_MMR space to syscon is not a good idea. > Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them > in the USB0/USB1 nodes. > > Signed-off-by: Roger Quadros > --- > Reviewed-by: Andrew Davis > Notes: > Changelog: > > v3 - no change > > v2: > - moved am62p changes to next patch > - use new compatible for USB PHY CTRL node > > arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 ++-- > arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 10 ++++++++++ > arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 ++-- > arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 ++++++++++ > 4 files changed, 24 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > index 464b7565d085..9432ed344d52 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > @@ -625,7 +625,7 @@ usbss0: dwc3-usb@f900000 { > reg = <0x00 0x0f900000 0x00 0x800>; > clocks = <&k3_clks 161 3>; > clock-names = "ref"; > - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; > + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; > #address-cells = <2>; > #size-cells = <2>; > power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; > @@ -648,7 +648,7 @@ usbss1: dwc3-usb@f910000 { > reg = <0x00 0x0f910000 0x00 0x800>; > clocks = <&k3_clks 162 3>; > clock-names = "ref"; > - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; > + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; > #address-cells = <2>; > #size-cells = <2>; > power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; > diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi > index fef76f52a52e..817700b2eacf 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi > @@ -19,6 +19,16 @@ chipid: chipid@14 { > compatible = "ti,am654-chipid"; > reg = <0x14 0x4>; > }; > + > + usb0_phy_ctrl: syscon@4008 { > + compatible = "ti,am62-usb-phy-ctrl", "syscon"; > + reg = <0x4008 0x4>; > + }; > + > + usb1_phy_ctrl: syscon@4018 { > + compatible = "ti,am62-usb-phy-ctrl", "syscon"; > + reg = <0x4018 0x4>; > + }; > }; > > wkup_uart0: serial@2b300000 { > diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi > index f0b8c9ab1459..8311c7c44cd3 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi > @@ -566,7 +566,7 @@ usbss0: dwc3-usb@f900000 { > reg = <0x00 0x0f900000 0x00 0x800>; > clocks = <&k3_clks 161 3>; > clock-names = "ref"; > - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>; > + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>; > #address-cells = <2>; > #size-cells = <2>; > power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>; > @@ -589,7 +589,7 @@ usbss1: dwc3-usb@f910000 { > reg = <0x00 0x0f910000 0x00 0x800>; > clocks = <&k3_clks 162 3>; > clock-names = "ref"; > - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; > + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>; > #address-cells = <2>; > #size-cells = <2>; > power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; > diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi > index 4e8279fa01e1..4a375f5e0c19 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi > @@ -17,6 +17,16 @@ chipid: chipid@14 { > compatible = "ti,am654-chipid"; > reg = <0x14 0x4>; > }; > + > + usb0_phy_ctrl: syscon@4008 { > + compatible = "ti,am62-usb-phy-ctrl", "syscon"; > + reg = <0x4008 0x4>; > + }; > + > + usb1_phy_ctrl: syscon@4018 { > + compatible = "ti,am62-usb-phy-ctrl", "syscon"; > + reg = <0x4018 0x4>; > + }; > }; > > wkup_uart0: serial@2b300000 {