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Tue, 10 Aug 2021 15:50:31 +0000 Received: from [10.21.26.179] (172.20.187.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 10 Aug 2021 15:50:29 +0000 Subject: Re: [PATCH v2 1/3] dt-bindings: Add YAML bindings for Host1x and NVDEC To: Thierry Reding , Rob Herring CC: , , , , , References: <20210806123450.2970777-1-mperttunen@nvidia.com> <20210806123450.2970777-2-mperttunen@nvidia.com> From: Mikko Perttunen Message-ID: Date: Tue, 10 Aug 2021 18:50:26 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [172.20.187.5] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 503aa930-5e8e-4d3a-b57d-08d95c1695b1 X-MS-TrafficTypeDiagnostic: CH2PR12MB3847: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Aug 2021 15:50:31.8943 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 503aa930-5e8e-4d3a-b57d-08d95c1695b1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT033.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB3847 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 10.8.2021 18.43, Thierry Reding wrote: > On Fri, Aug 06, 2021 at 03:34:48PM +0300, Mikko Perttunen wrote: >> Convert the original Host1x bindings to YAML and add new bindings for >> NVDEC, now in a more appropriate location. The old text bindings >> for Host1x and engines are still kept at display/tegra/ since they >> encompass a lot more engines that haven't been converted over yet. >> >> Signed-off-by: Mikko Perttunen >> --- >> v2: >> * Fix issues pointed out in v1 >> * Add T194 nvidia,instance property >> --- >> .../gpu/host1x/nvidia,tegra20-host1x.yaml | 131 ++++++++++++++++++ >> .../gpu/host1x/nvidia,tegra210-nvdec.yaml | 109 +++++++++++++++ >> MAINTAINERS | 1 + >> 3 files changed, 241 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra20-host1x.yaml >> create mode 100644 Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml > > Can we split off the NVDEC bindings addition into a separate patch? I've > been working on converting the existing host1x bindings in full to json- > schema and this partial conversion would conflict with that effort. > > I assume that NVDEC itself validates properly even if host1x hasn't been > converted yet? Sure. I thought I had some problems with this before but can't see any now. > >> diff --git a/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml b/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml >> new file mode 100644 >> index 000000000000..fc535bb7aee0 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml >> @@ -0,0 +1,109 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#" >> +$schema: "http://devicetree.org/meta-schemas/core.yaml#" >> + >> +title: Device tree binding for NVIDIA Tegra NVDEC >> + >> +description: | >> + NVDEC is the hardware video decoder present on NVIDIA Tegra210 >> + and newer chips. It is located on the Host1x bus and typically >> + programmed through Host1x channels. >> + >> +maintainers: >> + - Thierry Reding >> + - Mikko Perttunen >> + >> +properties: >> + $nodename: >> + pattern: "^nvdec@[0-9a-f]*$" >> + >> + compatible: >> + enum: >> + - nvidia,tegra210-nvdec >> + - nvidia,tegra186-nvdec >> + - nvidia,tegra194-nvdec >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> + clock-names: >> + items: >> + - const: nvdec >> + >> + resets: >> + maxItems: 1 >> + >> + reset-names: >> + items: >> + - const: nvdec >> + >> + power-domains: >> + maxItems: 1 >> + >> + iommus: >> + maxItems: 1 >> + >> + interconnects: >> + items: >> + - description: DMA read memory client >> + - description: DMA read 2 memory client >> + - description: DMA write memory client >> + >> + interconnect-names: >> + items: >> + - const: dma-mem >> + - const: read2 > > The convention that we've used so far has been to start numbering these > at 0 and use a dash, so this would be "read-1". Will fix. > >> + - const: write >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - resets >> + - reset-names >> + - power-domains >> + >> +if: >> + properties: >> + compatible: >> + contains: >> + const: nvidia,tegra194-host1x >> +then: >> + properties: >> + nvidia,instance: >> + items: >> + - description: 0 for NVDEC0, or 1 for NVDEC1 > > I know we had discussed this before, but looking at the driver patch, I > don't actually see this being used now, so I wonder if we still need it. > >> +additionalProperties: true > > Maybe this should have a comment noting that this should really be > unevaluatedProperties: false, but we can't use that because the tooling > doesn't support it yet? I can add such a comment if desired. Honestly, I don't really know what 'unevaluatedProperties' means or does -- the explanation in example-schema.yaml doesn't seem like it's relevant here and I cannot find any other documentation. Thanks, Mikko > > Rob, what's the current best practice for that? I see that there are > quite a few bindings that use unevaluatedProperties, so I wonder if we > just ignore errors from that for now? Or do we have some development > branch of the tooling somewhere that supports this now? I vaguely recall > reading about work in progress patches for this, but I can't find the > link now to see if there's been an update since I last looked. > > Thierry >