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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id g18-20020a2eb5d2000000b002d9fc892cc3sm1718213ljn.13.2024.04.23.05.35.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 23 Apr 2024 05:35:16 -0700 (PDT) Message-ID: Date: Tue, 23 Apr 2024 14:35:14 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] clk: qcom: lpassaudiocc-sc7280: Add support to skip PLL configuration To: Taniya Das , Stephen Boyd , Michael Turquette , Bjorn Andersson , Rob Herring , Conor Dooley , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org References: <20240208062836.19767-1-quic_tdas@quicinc.com> <20240208062836.19767-3-quic_tdas@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20240208062836.19767-3-quic_tdas@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 2/8/24 07:28, Taniya Das wrote: > The PLL configuration needs to be skipped when remoteproc brings the > LPASS out of reset. > > Also update the lpassaudio_cc_reset regmap name and max register to handle > the regmap conflict warning between lpassaudio_cc_reset and lpassaudio_cc. > > Fixes: a9dd26639d05 ("clk: qcom: lpass: Add support for LPASS clock controller for SC7280") > Signed-off-by: Taniya Das > --- > drivers/clk/qcom/lpassaudiocc-sc7280.c | 14 ++++++++++---- > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c > index c43d0b1af7f7..2619a8ced9d5 100644 > --- a/drivers/clk/qcom/lpassaudiocc-sc7280.c > +++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0-only > /* > * Copyright (c) 2021, The Linux Foundation. All rights reserved. > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > */ > > #include > @@ -766,11 +767,13 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev) > goto exit; > } > > - clk_zonda_pll_configure(&lpass_audio_cc_pll, regmap, &lpass_audio_cc_pll_config); > + if (!of_property_read_bool(pdev->dev.of_node, "qcom,adsp-skip-pll")) { Big no-no. > + clk_zonda_pll_configure(&lpass_audio_cc_pll, regmap, &lpass_audio_cc_pll_config); > > - /* PLL settings */ > - regmap_write(regmap, 0x4, 0x3b); > - regmap_write(regmap, 0x8, 0xff05); > + /* PLL settings */ > + regmap_write(regmap, 0x4, 0x3b); > + regmap_write(regmap, 0x8, 0xff05); Model these properly and use the abstracted clock (re)configuration functions. Add the unreachable clocks to `protected-clocks = <>` and make sure that the aforementioned configure calls check if the PLL was really registered. > + } > > ret = qcom_cc_really_probe(pdev, &lpass_audio_cc_sc7280_desc, regmap); > if (ret) { > @@ -778,6 +781,9 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev) > goto exit; > } > > + lpass_audio_cc_sc7280_regmap_config.name = "lpassaudio_cc_reset"; Ugh.. are these really not contiguous, or were the register ranges misrepresented from the start? > + lpass_audio_cc_sc7280_regmap_config.max_register = 0xc8; Provide the real size of the block in .max_register instead, unconditionally Konrad