From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dinh Nguyen Subject: Re: [PATCH 10/12] ARM: dts: socfpga: add base fpga region and fpga bridges Date: Fri, 6 Jan 2017 01:39:25 -0600 Message-ID: References: <1483575694-29599-1-git-send-email-dinguyen@kernel.org> <1483575694-29599-11-git-send-email-dinguyen@kernel.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Alan Tull Cc: Alan Tull , "devicetree@vger.kernel.org" , Dinh Nguyen , "linux-arm-kernel@lists.infradead.org" List-Id: devicetree@vger.kernel.org On 01/05/2017 10:34 AM, Alan Tull wrote: > On Thu, Jan 5, 2017 at 10:28 AM, Alan Tull wrote: >> On Wed, Jan 4, 2017 at 6:21 PM, Dinh Nguyen wrote: >>> From: Alan Tull >>> >>> Add h2f and lwh2f bridges. >>> Add base FPGA Region to support DT overlays for FPGA programming. >>> Add l3regs. >>> >>> Signed-off-by: Alan Tull >>> Signed-off-by: Dinh Nguyen >>> --- >>> arch/arm/boot/dts/socfpga.dtsi | 31 +++++++++++++++++++++++++++++++ >>> 1 file changed, 31 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi >>> index de29172..dccc281 100644 >>> --- a/arch/arm/boot/dts/socfpga.dtsi >>> +++ b/arch/arm/boot/dts/socfpga.dtsi >>> @@ -93,6 +93,16 @@ >>> }; >>> }; >>> >>> + base_fpga_region { >>> + compatible = "fpga-region"; >>> + fpga-mgr = <&fpgamgr0>; >>> + fpga-bridges = <&fpga_bridge0>, <&fpga_bridge1>; >> >> Hi Dinh, >> >> We want to get rid of the 'fpga-bridges' line. >> >>> + >>> + #address-cells = <0x1>; >>> + #size-cells = <0x1>; >>> + ranges = <0 0xff200000 0x100000>; >> >> Should get rid of the ranges line here too. The 'fpga-bridges' and >> 'ranges' line can be added in the overlay. >> >> Alan >> >>> + }; >>> + >>> can0: can@ffc00000 { >>> compatible = "bosch,d_can"; >>> reg = <0xffc00000 0x1000>; >>> @@ -513,6 +523,22 @@ >>> }; >>> }; >>> >>> + fpga_bridge0: fpga_bridge@ff400000 { >>> + compatible = "altr,socfpga-lwhps2fpga-bridge"; >>> + reg = <0xff400000 0x100000>; >>> + resets = <&rst LWHPS2FPGA_RESET>; >>> + reset-names = "lwhps2fpga"; > > The driver doesn't need 'reset-names' here or below for fpga_bridge1. > Ok, thanks for the review. Dinh