From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: rva333@protonmail.com, Srinivas Kandagatla <srini@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Andrew-CT Chen <andrew-ct.chen@mediatek.com>,
Lala Lin <lala.lin@mediatek.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH 2/3] nvmem: mtk-efuse: add support for 32-bit aligned reads
Date: Mon, 20 Jul 2026 14:48:36 +0200 [thread overview]
Message-ID: <c2b85740-4372-4609-a9fa-930010f5296a@collabora.com> (raw)
In-Reply-To: <20260715-6572-nvmem-v1-2-9c13be99d077@protonmail.com>
On 7/15/26 16:27, Roman Vivchar via B4 Relay wrote:
> From: Roman Vivchar <rva333@protonmail.com>
>
> Some MediaTek SoCs, such as mt6572, don't support 8-bit reads, leading
> to zeroes or garbage data. 32-bit aligned reads must be used instead.
>
> Introduce an 'needs_aligned_read' field to the platform data to enforce
> 32-bit aligned register access. All reads will be performed by reading
> 4-byte words and masking them.
>
> Signed-off-by: Roman Vivchar <rva333@protonmail.com>
You're effectively overriding the entire mtk_reg_read function when
needs_aligned_read==true... so.... (check below)
> ---
> drivers/nvmem/mtk-efuse.c | 31 ++++++++++++++++++++++++++++---
> 1 file changed, 28 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/nvmem/mtk-efuse.c b/drivers/nvmem/mtk-efuse.c
> index af953e1d9230..1462f2760818 100644
> --- a/drivers/nvmem/mtk-efuse.c
> +++ b/drivers/nvmem/mtk-efuse.c
> @@ -4,6 +4,7 @@
> * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
> */
>
> +#include <linux/align.h>
> #include <linux/device.h>
> #include <linux/module.h>
> #include <linux/mod_devicetable.h>
> @@ -14,10 +15,12 @@
>
> struct mtk_efuse_pdata {
> bool uses_post_processing;
> + bool needs_aligned_read;
> };
>
> struct mtk_efuse_priv {
> void __iomem *base;
> + const struct mtk_efuse_pdata *data;
...instead of adding pdata here...
> };
>
> static int mtk_reg_read(void *context,
> @@ -28,6 +31,26 @@ static int mtk_reg_read(void *context,
> u8 *val = _val;
> int i;
>
> + if (priv->data->needs_aligned_read) {
> + u32 pos, shift, val32;
> +
> + for (i = 0; i < bytes; i++, val++) {
> + pos = reg + i;
> +
> + /*
> + * Read on 32-bit word boundary or if it's the first
> + * iteration
> + */
> + if (i == 0 || IS_ALIGNED(pos, 4))
> + val32 = readl(priv->base + (pos & ~3));
> +
> + shift = (pos & 3) * 8;
> + *val = (val32 >> shift) & 0xff;
> + }
> +
> + return 0;
> + }
> +
> for (i = 0; i < bytes; i++, val++)
> *val = readb(addr + i);
>
> @@ -67,7 +90,6 @@ static int mtk_efuse_probe(struct platform_device *pdev)
> struct nvmem_device *nvmem;
> struct nvmem_config econfig = {};
> struct mtk_efuse_priv *priv;
> - const struct mtk_efuse_pdata *pdata;
> struct platform_device *socinfo;
>
> priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> @@ -78,7 +100,8 @@ static int mtk_efuse_probe(struct platform_device *pdev)
> if (IS_ERR(priv->base))
> return PTR_ERR(priv->base);
>
> - pdata = device_get_match_data(dev);
> + priv->data = device_get_match_data(dev);
> +
...and instead of changing a bunch of lines here...
> econfig.add_legacy_fixed_of_cells = true;
> econfig.stride = 1;
> econfig.word_size = 1;
it's easier at this point if you simply do
if (pdata->needs_aligned_read) {
econfig.stride = 4;
econfig.reg_read = mtk_reg_read_aligned;
} else {
econfig.stride = 1;
econfig.reg_read = mtk_reg_read;
}
and you avoid touching mtk_reg_read entirely.
Though it's not going to be used in any performance path, that's also faster as
there's one less branch per execution.
Cheers,
Angelo
next prev parent reply other threads:[~2026-07-20 12:48 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 14:27 [PATCH 0/3] nvmem: mtk-efuse: mt6572 support Roman Vivchar via B4 Relay
2026-07-15 14:27 ` [PATCH 1/3] dt-bindings: nvmem: mediatek: efuse: add mt6572 Roman Vivchar via B4 Relay
2026-07-20 12:48 ` AngeloGioacchino Del Regno
2026-07-15 14:27 ` [PATCH 2/3] nvmem: mtk-efuse: add support for 32-bit aligned reads Roman Vivchar via B4 Relay
2026-07-20 12:48 ` AngeloGioacchino Del Regno [this message]
2026-07-20 14:02 ` Roman Vivchar
2026-07-15 14:27 ` [PATCH 3/3] nvmem: mtk-efuse: add mt6572 support Roman Vivchar via B4 Relay
2026-07-15 14:45 ` sashiko-bot
2026-07-20 12:48 ` AngeloGioacchino Del Regno
2026-07-20 13:33 ` Roman Vivchar
2026-07-20 17:31 ` Roman Vivchar
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